<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: SPI Interrupt Enable Register in S32K</title>
    <link>https://community.nxp.com/t5/S32K/SPI-Interrupt-Enable-Register/m-p/1450526#M15189</link>
    <description>&lt;P&gt;Hi&amp;nbsp;qiansan,&lt;/P&gt;
&lt;P&gt;You can see the condition that triggers the interrupt from the section&amp;nbsp;&lt;STRONG&gt;51.3.1.5 Status Register (SR)&lt;/STRONG&gt; and&amp;nbsp;&lt;STRONG&gt;51.4.4 Interrupts and DMA Requests &lt;/STRONG&gt;of&amp;nbsp;&lt;A id="relatedDocsClickPDF_1" class="dtmcustomrulelink" href="https://www.nxp.com/webapp/Download?colCode=S32K1XXRM" target="_blank" rel="noopener" data-dtmaction="Design Resources Section - Documentation - Results Link Click" data-dtmsubaction="S32K1xx MCU Family - Reference Manual - NXP - Reference Manual - English"&gt;&lt;SPAN&gt;S32K1xx MCU Family - Reference Manual&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;.&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="TDF 51.3.1.5 Status Register (SR).png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/178287i53019DD2DCAA5966/image-size/large?v=v2&amp;amp;px=999" role="button" title="TDF 51.3.1.5 Status Register (SR).png" alt="TDF 51.3.1.5 Status Register (SR).png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="51.4.4 Interrupts and DMA Requests.png" style="width: 734px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/178288i49AD3458AC620C10/image-size/large?v=v2&amp;amp;px=999" role="button" title="51.4.4 Interrupts and DMA Requests.png" alt="51.4.4 Interrupts and DMA Requests.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;BR /&gt;Robin&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
    <pubDate>Thu, 28 Apr 2022 08:07:52 GMT</pubDate>
    <dc:creator>Robin_Shen</dc:creator>
    <dc:date>2022-04-28T08:07:52Z</dc:date>
    <item>
      <title>SPI Interrupt Enable Register</title>
      <link>https://community.nxp.com/t5/S32K/SPI-Interrupt-Enable-Register/m-p/1450450#M15181</link>
      <description>&lt;P&gt;Will setting the SPI ier to TDIE position 1 cause the SPI controller to send an interrupt request to the NVIC；&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="1.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/178276iDABDE2C78F8B9260/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.png" alt="1.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 28 Apr 2022 06:20:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SPI-Interrupt-Enable-Register/m-p/1450450#M15181</guid>
      <dc:creator>qiansan</dc:creator>
      <dc:date>2022-04-28T06:20:12Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Interrupt Enable Register</title>
      <link>https://community.nxp.com/t5/S32K/SPI-Interrupt-Enable-Register/m-p/1450526#M15189</link>
      <description>&lt;P&gt;Hi&amp;nbsp;qiansan,&lt;/P&gt;
&lt;P&gt;You can see the condition that triggers the interrupt from the section&amp;nbsp;&lt;STRONG&gt;51.3.1.5 Status Register (SR)&lt;/STRONG&gt; and&amp;nbsp;&lt;STRONG&gt;51.4.4 Interrupts and DMA Requests &lt;/STRONG&gt;of&amp;nbsp;&lt;A id="relatedDocsClickPDF_1" class="dtmcustomrulelink" href="https://www.nxp.com/webapp/Download?colCode=S32K1XXRM" target="_blank" rel="noopener" data-dtmaction="Design Resources Section - Documentation - Results Link Click" data-dtmsubaction="S32K1xx MCU Family - Reference Manual - NXP - Reference Manual - English"&gt;&lt;SPAN&gt;S32K1xx MCU Family - Reference Manual&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;.&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="TDF 51.3.1.5 Status Register (SR).png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/178287i53019DD2DCAA5966/image-size/large?v=v2&amp;amp;px=999" role="button" title="TDF 51.3.1.5 Status Register (SR).png" alt="TDF 51.3.1.5 Status Register (SR).png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="51.4.4 Interrupts and DMA Requests.png" style="width: 734px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/178288i49AD3458AC620C10/image-size/large?v=v2&amp;amp;px=999" role="button" title="51.4.4 Interrupts and DMA Requests.png" alt="51.4.4 Interrupts and DMA Requests.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;BR /&gt;Robin&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Thu, 28 Apr 2022 08:07:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SPI-Interrupt-Enable-Register/m-p/1450526#M15189</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2022-04-28T08:07:52Z</dc:date>
    </item>
  </channel>
</rss>

