Disabling Global Interrupts inside ISR

Maciek — Fri, 08 Apr 2022 09:42:46 GMT

Hi,

we have an application (S32K118 - Cortex-M0+) where a few parameters can be changed upon the request via CAN or UART. The requests set the global variables inside the Receive ISR.
Subsequently, the highest priority (lowest importance) PIT Timer ISR reads those variables. To ensure the data integrity we want to temporarily switch off ALL the Interrupts while reading the global variables inside Timer ISR. Is it safe/recommended to use DISABLE_INTERRUPTS() just before reading globals inside Timer ISR and to call ENABLE_INTERRUPTS() just after the reading - to make a kind of 'critical section' this way ?

What about memory and instruction barriers like __DSB() and __ISB() - should we use them (it's Cortex-M0+) in this case ?
Will it change if we would like to switch off only particular Interrupts (like CAN receive interrupt) ?

Are there any differences if we want to apply above solution in case of i.MX RT (Cortex-M7) ?

Thanks

Maciek

Re: Disabling Global Interrupts inside ISR

danielmartynek — Fri, 08 Apr 2022 15:02:43 GMT

Hi @Maciek,

I don't see any issue with that.

The interrupt can be preempted only by an interrupt with a higher priority.

So, you can mask the interrupt globally as you mentioned.

Regarding the barriers, please refer to this document:

ARM Cortex ™ -M Programming Guide to Memory Barrier Instructions Application Note 321

https://documentation-service.arm.com/static/5efefb97dbdee951c1cd5aaf?token=

4.8 Disabling interrupts using CPS and MSR instructions
4.7 Enabling interrupts using CPS instructions and MSR instructions

There are no errata related to this:

https://www.nxp.com/docs/en/errata/S32K118_0N97V.pdf

I'm not familiar with i.MX RT, please create a new thread on the i.MX RT community.

Regards,

Daniel

topic Disabling Global Interrupts inside ISR in S32K

Disabling Global Interrupts inside ISR

Re: Disabling Global Interrupts inside ISR