<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックS32K144 ADC</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/706911#M1414</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm a bit confused about the terminology used in S32k ref manual regarding the ADC status and control registers&amp;nbsp;.&lt;/P&gt;&lt;P&gt;It is about the ADC&amp;nbsp; SC1 register, There is SC1A, SC1B.....SC1Z ad then there is SC1A:SC1n and there is SC1[ NUMBER OF CHANNELS] .&lt;/P&gt;&lt;P&gt;what are the differences in all of those?&lt;/P&gt;&lt;P&gt;Are&amp;nbsp;SC1A[0],SC1A[1]....SC1A[31]&amp;nbsp; the same as SC1[0]..SC1[1]....SC1[31] ?&lt;/P&gt;&lt;P&gt;Is SC1A[1] THE SAME AS SC1B or is it SC1[0] WHICH IS THE SAME AS SC1[B]?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I like to trigger on 4 different channel back2back, I tried to do this using SC1A,SC1B,SC1C,SC1D but it did not work,&lt;/P&gt;&lt;P&gt;I've done it using SC1A over and over but this is not efficient , I think I&amp;nbsp;# could use PDB however I just can't understand all these terminology.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please help.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Koorosh Hajiani&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 15 Oct 2017 03:59:40 GMT</pubDate>
    <dc:creator>hajianik</dc:creator>
    <dc:date>2017-10-15T03:59:40Z</dc:date>
    <item>
      <title>S32K144 ADC</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/706911#M1414</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm a bit confused about the terminology used in S32k ref manual regarding the ADC status and control registers&amp;nbsp;.&lt;/P&gt;&lt;P&gt;It is about the ADC&amp;nbsp; SC1 register, There is SC1A, SC1B.....SC1Z ad then there is SC1A:SC1n and there is SC1[ NUMBER OF CHANNELS] .&lt;/P&gt;&lt;P&gt;what are the differences in all of those?&lt;/P&gt;&lt;P&gt;Are&amp;nbsp;SC1A[0],SC1A[1]....SC1A[31]&amp;nbsp; the same as SC1[0]..SC1[1]....SC1[31] ?&lt;/P&gt;&lt;P&gt;Is SC1A[1] THE SAME AS SC1B or is it SC1[0] WHICH IS THE SAME AS SC1[B]?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I like to trigger on 4 different channel back2back, I tried to do this using SC1A,SC1B,SC1C,SC1D but it did not work,&lt;/P&gt;&lt;P&gt;I've done it using SC1A over and over but this is not efficient , I think I&amp;nbsp;# could use PDB however I just can't understand all these terminology.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please help.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Koorosh Hajiani&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 15 Oct 2017 03:59:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/706911#M1414</guid>
      <dc:creator>hajianik</dc:creator>
      <dc:date>2017-10-15T03:59:40Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 ADC</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/706912#M1415</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I see no SC1A[0],SC1A[1]....SC1A[31]&amp;nbsp; or SC1[0]..SC1[1]....SC1[31] &amp;nbsp;convention in the RM.&lt;/P&gt;&lt;P&gt;Moreover there are only 16 channels on the S32K144 and so SC1A, SC1B.....SC1P are used.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For the back2back configuration you can refer to &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-332749"&gt;Example S32K144 PDB ADC back-to-back test S32DS12&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 18 Oct 2017 07:39:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/706912#M1415</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2017-10-18T07:39:49Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 AD</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/1170062#M8524</link>
      <description>&lt;P&gt;Hi, Dear&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; I'm using the pdb method to trigger the adc ,the concrete way is that, using the PDB0_CHANNEL0 pretrigger and trigger ADC0_CHANNEL0~7,after that continue to use PDB0_CHANNEL1 to pretrigger and trigger ADC0_CHANNEL8~15,(Using the SDK3.0),But ,I find that,the ADC8~ADC15 can not be pretrigger ang trigger, I want to Know what's the reason of it,the chip that i use is s32k144 with 64pins.Except that,I find the Example 'S32k144 PDB ADC back-to-back test S32k144 ' can not be gotten ,it display an invalid parameters specified,what's the reason of it? Thanks&lt;/P&gt;&lt;H1&gt;&amp;nbsp;&lt;/H1&gt;</description>
      <pubDate>Tue, 20 Oct 2020 05:55:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-ADC/m-p/1170062#M8524</guid>
      <dc:creator>xzj666</dc:creator>
      <dc:date>2020-10-20T05:55:08Z</dc:date>
    </item>
  </channel>
</rss>

