<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic S32K148 GPIO output privileged access in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1386398#M13231</link>
    <description>&lt;P&gt;We use the S32K148 in an automotive application with some ASIL B functionality.&lt;/P&gt;&lt;P&gt;Safety block diagram (p.107 of S32K-RM.pdf rev 13)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_0-1639479039923.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165121i91BFCE232FA86C72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_0-1639479039923.png" alt="jeremie_chirat_0-1639479039923.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_0-1639479039923.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We want to prevent non safe code (unprivileged code) from changing the GPIO outputs.&lt;/P&gt;&lt;P&gt;Safe code (Highest ASIL level of the application) must still be able to change GPIO Outputs at all times (not only at startup but also at runtime)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We cannot seem to protect the GPIO controller using MPU: p.281 of S32K-RM.pdf rev 13&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_1-1639479039960.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165124i2917920D4D0DBDB6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_1-1639479039960.png" alt="jeremie_chirat_1-1639479039960.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_1-1639479039960.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We know that the mux configuration of the GPIOs can be protected:&lt;/P&gt;&lt;P&gt;S32K1xx_Memory_Map.xlsx :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_2-1639479039988.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165122i6250E3622E6F13C6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_2-1639479039988.png" alt="jeremie_chirat_2-1639479039988.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_2-1639479039988.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However the S32K148 doesn’t seem to allow to configure the access rights of the GPIO controller.&lt;/P&gt;&lt;P&gt;We do know it is available for S32K118, and have studied the aips_demo_s32k118 form the S32K knowledge base:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/aips-demo-s32k118-zip/ta-p/1124234" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/aips-demo-s32k118-zip/ta-p/1124234&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_3-1639479040005.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165125i16D3288B117922B2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_3-1639479040005.png" alt="jeremie_chirat_3-1639479040005.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_3-1639479040005.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The aliased peripheral of does not have any registers allowing privilege control.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_4-1639479040024.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165126iD6CBB69D51C26BE9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_4-1639479040024.png" alt="jeremie_chirat_4-1639479040024.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_4-1639479040024.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_5-1639479040164.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165127i874A028F80635430/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_5-1639479040164.png" alt="jeremie_chirat_5-1639479040164.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_5-1639479040164.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I thought we could use the clock gating of the SIM module (which himself can be protected from unprivileged access),&lt;/P&gt;&lt;P&gt;but on p.169 of S32K-RM.pdf rev 13, it says that clock gating is not available for our MCU S32K148, only for S32K11x variants.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_6-1639479040182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165128i033375452F31F896/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_6-1639479040182.png" alt="jeremie_chirat_6-1639479040182.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_6-1639479040182.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any way to protect the access to the GPIOs outputs for S32K148 ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your help.&lt;/P&gt;</description>
    <pubDate>Tue, 14 Dec 2021 10:54:49 GMT</pubDate>
    <dc:creator>jeremie_chirat</dc:creator>
    <dc:date>2021-12-14T10:54:49Z</dc:date>
    <item>
      <title>S32K148 GPIO output privileged access</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1386398#M13231</link>
      <description>&lt;P&gt;We use the S32K148 in an automotive application with some ASIL B functionality.&lt;/P&gt;&lt;P&gt;Safety block diagram (p.107 of S32K-RM.pdf rev 13)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_0-1639479039923.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165121i91BFCE232FA86C72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_0-1639479039923.png" alt="jeremie_chirat_0-1639479039923.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_0-1639479039923.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We want to prevent non safe code (unprivileged code) from changing the GPIO outputs.&lt;/P&gt;&lt;P&gt;Safe code (Highest ASIL level of the application) must still be able to change GPIO Outputs at all times (not only at startup but also at runtime)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We cannot seem to protect the GPIO controller using MPU: p.281 of S32K-RM.pdf rev 13&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_1-1639479039960.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165124i2917920D4D0DBDB6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_1-1639479039960.png" alt="jeremie_chirat_1-1639479039960.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_1-1639479039960.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We know that the mux configuration of the GPIOs can be protected:&lt;/P&gt;&lt;P&gt;S32K1xx_Memory_Map.xlsx :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_2-1639479039988.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165122i6250E3622E6F13C6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_2-1639479039988.png" alt="jeremie_chirat_2-1639479039988.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_2-1639479039988.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However the S32K148 doesn’t seem to allow to configure the access rights of the GPIO controller.&lt;/P&gt;&lt;P&gt;We do know it is available for S32K118, and have studied the aips_demo_s32k118 form the S32K knowledge base:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/aips-demo-s32k118-zip/ta-p/1124234" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/aips-demo-s32k118-zip/ta-p/1124234&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_3-1639479040005.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165125i16D3288B117922B2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_3-1639479040005.png" alt="jeremie_chirat_3-1639479040005.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_3-1639479040005.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The aliased peripheral of does not have any registers allowing privilege control.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_4-1639479040024.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165126iD6CBB69D51C26BE9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_4-1639479040024.png" alt="jeremie_chirat_4-1639479040024.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_4-1639479040024.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_5-1639479040164.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165127i874A028F80635430/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_5-1639479040164.png" alt="jeremie_chirat_5-1639479040164.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_5-1639479040164.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I thought we could use the clock gating of the SIM module (which himself can be protected from unprivileged access),&lt;/P&gt;&lt;P&gt;but on p.169 of S32K-RM.pdf rev 13, it says that clock gating is not available for our MCU S32K148, only for S32K11x variants.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremie_chirat_6-1639479040182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/165128i033375452F31F896/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremie_chirat_6-1639479040182.png" alt="jeremie_chirat_6-1639479040182.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jeremie_chirat_6-1639479040182.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any way to protect the access to the GPIOs outputs for S32K148 ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your help.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Dec 2021 10:54:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1386398#M13231</guid>
      <dc:creator>jeremie_chirat</dc:creator>
      <dc:date>2021-12-14T10:54:49Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 GPIO output privileged access</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1387326#M13258</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/167433"&gt;@jeremie_chirat&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I'm afraid you are right, the access can't be restricted.&lt;/P&gt;
&lt;P&gt;The GPIO module is not on the Peripheral Bridge (AIPS-Lite) and the S2 port of the Crossbar switch is not protected by the MPU.&lt;/P&gt;
&lt;P&gt;Since this is a question on the S32K Functional Safety,&lt;/P&gt;
&lt;P&gt;please use the SafeAssure Community Group.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/groups/safeassure-nda" target="_blank"&gt;https://community.nxp.com/groups/safeassure-nda&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-335524" target="_blank"&gt;https://community.nxp.com/docs/DOC-335524&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Thank you,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
      <pubDate>Wed, 15 Dec 2021 13:22:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1387326#M13258</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2021-12-15T13:22:47Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 GPIO output privileged access</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1387337#M13259</link>
      <description>&lt;P&gt;Hello Daniel&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My colleague&amp;nbsp;Mattia Secchiaroli has posted on the NDA SafeAssure Community Group almost a month ago, but we did not get any answer,&lt;/P&gt;&lt;P&gt;that is why I tried here on the normal S32K board.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here is the link to the original post on the NDA group:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/SafeAssure-NDA-group/GPIO-ASIL-protection/m-p/1374873" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/SafeAssure-NDA-group/GPIO-ASIL-protection/m-p/1374873&lt;/A&gt;&lt;/P&gt;&lt;P&gt;We know as I wrote that it cannot be protected by MPU, but we would like to know if there is any way to protect it with another mechanism (using privilege access to some registers or something else entirely).&lt;/P&gt;&lt;P&gt;Can you or another NXP colleague answer us on the SafeAssure post?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Jérémie Chirat&lt;/P&gt;</description>
      <pubDate>Wed, 15 Dec 2021 13:35:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1387337#M13259</guid>
      <dc:creator>jeremie_chirat</dc:creator>
      <dc:date>2021-12-15T13:35:56Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 GPIO output privileged access</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1388092#M13272</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/167433"&gt;@jeremie_chirat&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The SafeAssure team has just replied to the thread discussing some SW solutions.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Thu, 16 Dec 2021 11:03:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-GPIO-output-privileged-access/m-p/1388092#M13272</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2021-12-16T11:03:02Z</dc:date>
    </item>
  </channel>
</rss>

