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    <title>S32K中的主题 S32K344 FLS write fail</title>
    <link>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1385290#M13196</link>
    <description>&lt;P&gt;erase is OK but Fls_Write function write fail&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 13 Dec 2021 03:14:16 GMT</pubDate>
    <dc:creator>tianxing</dc:creator>
    <dc:date>2021-12-13T03:14:16Z</dc:date>
    <item>
      <title>S32K344 FLS write fail</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1385290#M13196</link>
      <description>&lt;P&gt;erase is OK but Fls_Write function write fail&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Dec 2021 03:14:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1385290#M13196</guid>
      <dc:creator>tianxing</dc:creator>
      <dc:date>2021-12-13T03:14:16Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 FLS write fail</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1385410#M13199</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@tianxing" target="_blank"&gt;Hi@tianxing&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;There is an example "&lt;FONT color="#3366FF"&gt;Example_S32KXX_DS_Fls&lt;/FONT&gt;" in S32 DS 3.4 for your reference. I just tested it and it works fine on my side.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1639378067063.png" style="width: 501px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/164916i5741D06E7A5AFE80/image-dimensions/501x252?v=v2" width="501" height="252" role="button" title="Senlent_0-1639378067063.png" alt="Senlent_0-1639378067063.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;BR!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Jim,&lt;/P&gt;</description>
      <pubDate>Mon, 13 Dec 2021 06:48:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1385410#M13199</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-12-13T06:48:10Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 FLS write fail</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1386152#M13221</link>
      <description>&lt;P&gt;Hi,Selent&lt;/P&gt;&lt;P&gt;Thank you for reply!&lt;/P&gt;&lt;P&gt;The example in S32DS3.4 is to control the data flash It works well.&lt;/P&gt;&lt;P&gt;And I made a change to erase and write the code flash,erase is OK but write always failed.&lt;/P&gt;&lt;P&gt;Do you know why?&lt;/P&gt;&lt;P&gt;The code is as below&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;main.c&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;#define FLS_START_ADDR 0x0U&lt;BR /&gt;#define FLS_INTERNAL_SECTOR_SIZE 0x2000U&lt;BR /&gt;#define FLS_NUM_OF_INTERNAL_SECTOR 25U&lt;BR /&gt;#define FLS_BUF_SIZE 104U&lt;/P&gt;&lt;P&gt;Fls_Init(NULL_PTR);&lt;BR /&gt;Fls_RXBufInit();&lt;BR /&gt;Fls_TXBufInit();&lt;BR /&gt;Fls_Erase(FLS_START_ADDR,FLS_INTERNAL_SECTOR_SIZE*FLS_NUM_OF_INTERNAL_SECTOR);&lt;BR /&gt;while(Fls_GetStatus()!=MEMIF_IDLE)&lt;BR /&gt;{&lt;BR /&gt;Fls_MainFunction();&lt;BR /&gt;}&lt;BR /&gt;if (MEMIF_JOB_OK != Fls_GetJobResult())&lt;BR /&gt;{&lt;BR /&gt;checkresult=false;&lt;BR /&gt;}&lt;BR /&gt;returnresult=Fls_Write(FLS_START_ADDR,Fls_TxData,FLS_BUF_SIZE);&lt;BR /&gt;while(Fls_GetStatus()!=MEMIF_IDLE)&lt;BR /&gt;{&lt;BR /&gt;Fls_MainFunction();&lt;BR /&gt;}&lt;BR /&gt;if (MEMIF_JOB_OK != Fls_GetJobResult())&lt;BR /&gt;{&lt;BR /&gt;checkresult=false;&lt;BR /&gt;Siul2_Dio_Ip_TogglePins(LED_2_PORT,(1&amp;lt;&amp;lt;LED_2_PIN));&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;Fls_Cfg&lt;/P&gt;&lt;P&gt;#define FLS_PROGRAM_FLASH_BASE_ADDR (0x00400000UL)&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Fls_BOARD_InitPeripherals_PBcfg.c&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_0_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x032000UL),&amp;nbsp;&lt;BR /&gt;57U&amp;nbsp;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_1_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x034000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;58U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_2_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x036000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;59U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_3_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x038000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;60U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_4_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x03A000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;61U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_5_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x03C000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;62U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_6_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x03E000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;63U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_7_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x040000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;64U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_8_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x042000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;65U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_9_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x044000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;66U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_10_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x046000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;67U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_11_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x048000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;68U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_12_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x04A000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;69U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_13_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x04C000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;70U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_14_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x04E000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;71U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_15_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x050000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;72U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_16_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x052000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;73U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_17_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x054000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;74U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_18_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x056000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;75U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_19_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x058000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;76U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_20_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x05A000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;77U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_21_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x05C000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;78U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_22_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x05E000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;79U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_23_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x060000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;80U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;static const Fls_Flash_InternalSectorInfoType FlsSector_24_FlsConfigSet_BOARD_InitPeripherals_sInternalSectorInfo =&lt;BR /&gt;{&lt;BR /&gt;(FLS_PROGRAM_FLASH_BASE_ADDR + 0x062000UL), /* pSectorStartAddressPtr */&lt;BR /&gt;81U /* Sector location to calculate cfgCRC */&lt;BR /&gt;};&lt;/P&gt;</description>
      <pubDate>Tue, 14 Dec 2021 07:22:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-FLS-write-fail/m-p/1386152#M13221</guid>
      <dc:creator>tianxing</dc:creator>
      <dc:date>2021-12-14T07:22:47Z</dc:date>
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