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    <title>S32KのトピックRe: S32K3</title>
    <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368519#M12704</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Ok, thank you very much！&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 09 Nov 2021 10:57:00 GMT</pubDate>
    <dc:creator>ye_jiawei</dc:creator>
    <dc:date>2021-11-09T10:57:00Z</dc:date>
    <item>
      <title>S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1367756#M12676</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I want to use Jlink on S32K344, but the current board simulation is not normal, I want to know when it can be resolved?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 08 Nov 2021 08:01:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1367756#M12676</guid>
      <dc:creator>ye_jiawei</dc:creator>
      <dc:date>2021-11-08T08:01:47Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1367825#M12680</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ye_jiawei" target="_blank"&gt;Hi@ye_jiawei&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; For now, J-LINK does not support for S32K3 in S32 Design Studio, and I have confirmed with the AE team, the specific release time is unclear.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; The latest Ozone provided by Segger's official website supports S32K3, and colleagues from AE have confirmed this.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Jim,&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 08 Nov 2021 09:55:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1367825#M12680</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-11-08T09:55:40Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1367867#M12682</link>
      <description>&lt;P&gt;&lt;FONT&gt;&lt;FONT&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;I have tried to use Ozone for simulation, but there was still a hardware error at the beginning. Could you please help me ask what is the wrong setting or what is the problem?&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt; Thank you！&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;/FONT&gt;&lt;/FONT&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 08 Nov 2021 11:23:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1367867#M12682</guid>
      <dc:creator>ye_jiawei</dc:creator>
      <dc:date>2021-11-08T11:23:50Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368170#M12688</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ye_jiawei" target="_blank"&gt;Hi@ye_jiawei&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Can you describe the problem you encountered clearly? For example, screenshots or debug Log information. I will help you record the current problem.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; As I know so far, S32K3 does not fully support Segger.&amp;nbsp; If there is an update, I will notify you in time.&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;update:‎05-18-2021&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1636427998948.png" style="width: 645px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/161589i431974F230A9FE34/image-dimensions/645x254?v=v2" width="645" height="254" role="button" title="Senlent_0-1636427998948.png" alt="Senlent_0-1636427998948.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;BR!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Jim,&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Tue, 09 Nov 2021 03:24:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368170#M12688</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-11-09T03:24:33Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368257#M12689</link>
      <description>&lt;P class=""&gt;The following two graphs are debug error messages.&lt;/P&gt;</description>
      <pubDate>Tue, 09 Nov 2021 06:48:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368257#M12689</guid>
      <dc:creator>ye_jiawei</dc:creator>
      <dc:date>2021-11-09T06:48:41Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368346#M12694</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ye_jiawei" target="_blank"&gt;Hi@ye_jiawei&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;According to the description of the debugger error exception message.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://wiki.segger.com/Cortex-M_Fault#HardFault_Status_Register_.28HFSR.29" target="_self"&gt;https://wiki.segger.com/Cortex-M_Fault#HardFault_Status_Register_.28HFSR.29&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;H4&gt;&lt;SPAN class="mw-headline"&gt;UsageFault Status Register (UFSR)&lt;/SPAN&gt;&lt;/H4&gt;
&lt;P&gt;The UFSR is a 16-bit pseudo-register, part of the Configurable Fault Status Register (CFSR) at address 0xE000ED28. It can also be directly accessed with halfword access to 0xE000ED2A.&lt;/P&gt;
&lt;P&gt;Bitfields:&lt;/P&gt;
&lt;PRE&gt;[9] DIVBYZERO  - If 1, SDIV or UDIV instruction executed with divisor 0.
[8] UNALIGNED  - If 1, LDM, STM, LDRD, STRD on unaligned address executed, or single load or store executed when enabled to trap.
[3] NOCP       - If 1, access to unsupported (e.g. not available or not enabled) coprocessor.
[2] INVPC      - If 1, illegal or invalid EXC_RETURN value load to PC.
[1] INVSTATE   - If 1, execution in invalid state. E.g. Thumb bit not set in EPSR, or invalid IT state in EPSR.
[0] UNDEFINSTR - If 1, execution of undefined instruction.&lt;/PRE&gt;
&lt;H3&gt;&lt;SPAN class="mw-headline"&gt;UsageFault Examples&lt;/SPAN&gt;&lt;/H3&gt;
&lt;H4&gt;&lt;SPAN class="mw-headline"&gt;Undefined Instruction Execution&lt;/SPAN&gt;&lt;/H4&gt;
&lt;DIV class="mw-highlight mw-content-ltr" dir="ltr"&gt;
&lt;PRE&gt;&lt;SPAN class="cm"&gt;/*********************************************************************&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*       _UndefInst()&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*  Function description&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*   Trigger a UsageFault or HardFault by executing an undefined instruction.&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*  Additional Information&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*    UsageFault is triggered on execution at the invalid address.&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*    Related registers on hard fault:&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*      HFSR = 0x40000000&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*        FORCED = 1           - UsageFault escalated to HardFault&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*      UFSR = 0x0001&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*        UNDEFINSTR = 1       - Undefined instruction executed&lt;/SPAN&gt;
&lt;SPAN class="cm"&gt;*/&lt;/SPAN&gt;
&lt;SPAN class="k"&gt;static&lt;/SPAN&gt; &lt;SPAN class="kt"&gt;int&lt;/SPAN&gt; &lt;SPAN class="nf"&gt;_UndefInst&lt;/SPAN&gt;&lt;SPAN class="p"&gt;(&lt;/SPAN&gt;&lt;SPAN class="kt"&gt;void&lt;/SPAN&gt;&lt;SPAN class="p"&gt;)&lt;/SPAN&gt; &lt;SPAN class="p"&gt;{&lt;/SPAN&gt;
  &lt;SPAN class="k"&gt;static&lt;/SPAN&gt; &lt;SPAN class="k"&gt;const&lt;/SPAN&gt; &lt;SPAN class="kt"&gt;unsigned&lt;/SPAN&gt; &lt;SPAN class="kt"&gt;short&lt;/SPAN&gt; &lt;SPAN class="n"&gt;_UDF&lt;/SPAN&gt;&lt;SPAN class="p"&gt;[&lt;/SPAN&gt;&lt;SPAN class="mi"&gt;4&lt;/SPAN&gt;&lt;SPAN class="p"&gt;]&lt;/SPAN&gt; &lt;SPAN class="o"&gt;=&lt;/SPAN&gt; &lt;SPAN class="p"&gt;{&lt;/SPAN&gt;&lt;SPAN class="mh"&gt;0xDEAD&lt;/SPAN&gt;&lt;SPAN class="p"&gt;,&lt;/SPAN&gt; &lt;SPAN class="mh"&gt;0xDEAD&lt;/SPAN&gt;&lt;SPAN class="p"&gt;,&lt;/SPAN&gt; &lt;SPAN class="mh"&gt;0xDEAD&lt;/SPAN&gt;&lt;SPAN class="p"&gt;,&lt;/SPAN&gt; &lt;SPAN class="mh"&gt;0xDEAD&lt;/SPAN&gt;&lt;SPAN class="p"&gt;};&lt;/SPAN&gt; &lt;SPAN class="c1"&gt;// 0xDEAD: UDF #&amp;lt;imm&amp;gt; (permanently undefined)&lt;/SPAN&gt;
  &lt;SPAN class="kt"&gt;int&lt;/SPAN&gt; &lt;SPAN class="n"&gt;r&lt;/SPAN&gt;&lt;SPAN class="p"&gt;;&lt;/SPAN&gt;
  &lt;SPAN class="kt"&gt;int&lt;/SPAN&gt; &lt;SPAN class="p"&gt;(&lt;/SPAN&gt;&lt;SPAN class="o"&gt;*&lt;/SPAN&gt;&lt;SPAN class="n"&gt;pF&lt;/SPAN&gt;&lt;SPAN class="p"&gt;)(&lt;/SPAN&gt;&lt;SPAN class="kt"&gt;void&lt;/SPAN&gt;&lt;SPAN class="p"&gt;);&lt;/SPAN&gt;

  &lt;SPAN class="n"&gt;pF&lt;/SPAN&gt; &lt;SPAN class="o"&gt;=&lt;/SPAN&gt; &lt;SPAN class="p"&gt;(&lt;/SPAN&gt;&lt;SPAN class="kt"&gt;int&lt;/SPAN&gt;&lt;SPAN class="p"&gt;(&lt;/SPAN&gt;&lt;SPAN class="o"&gt;*&lt;/SPAN&gt;&lt;SPAN class="p"&gt;)(&lt;/SPAN&gt;&lt;SPAN class="kt"&gt;void&lt;/SPAN&gt;&lt;SPAN class="p"&gt;))(((&lt;/SPAN&gt;&lt;SPAN class="kt"&gt;char&lt;/SPAN&gt;&lt;SPAN class="o"&gt;*&lt;/SPAN&gt;&lt;SPAN class="p"&gt;)&lt;/SPAN&gt;&lt;SPAN class="o"&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN class="n"&gt;_UDF&lt;/SPAN&gt;&lt;SPAN class="p"&gt;)&lt;/SPAN&gt; &lt;SPAN class="o"&gt;+&lt;/SPAN&gt; &lt;SPAN class="mi"&gt;1&lt;/SPAN&gt;&lt;SPAN class="p"&gt;);&lt;/SPAN&gt;
  &lt;SPAN class="c1"&gt;//  4B05        ldr r3, =0x08001C18 &amp;lt;_UDF&amp;gt; &amp;lt;- Load address of "RAM Code" instructions&lt;/SPAN&gt;
  &lt;SPAN class="c1"&gt;//  3301        adds r3, #1                &amp;lt;- Make sure Thumb bit is set&lt;/SPAN&gt;
  &lt;SPAN class="n"&gt;r&lt;/SPAN&gt; &lt;SPAN class="o"&gt;=&lt;/SPAN&gt; &lt;SPAN class="n"&gt;pF&lt;/SPAN&gt;&lt;SPAN class="p"&gt;();&lt;/SPAN&gt;
  &lt;SPAN class="c1"&gt;//  4798        blx r3                     &amp;lt;- Call "RAM Code", will execute UDF instruction and raise exception&lt;/SPAN&gt;
  &lt;SPAN class="c1"&gt;//  9000        str r0, [sp]&lt;/SPAN&gt;
  &lt;SPAN class="k"&gt;return&lt;/SPAN&gt; &lt;SPAN class="n"&gt;r&lt;/SPAN&gt;&lt;SPAN class="p"&gt;;&lt;/SPAN&gt;
&lt;SPAN class="p"&gt;}&lt;/SPAN&gt;&lt;/PRE&gt;
&lt;P&gt;It seems that this is not a problem caused by the debugger, please check if the code has similar problems.&lt;/P&gt;
&lt;P&gt;BR!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Jim,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Tue, 09 Nov 2021 08:14:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368346#M12694</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-11-09T08:14:24Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368422#M12696</link>
      <description>&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;I used the program of SDK package, which has the same problem, but these programs can run normally through PE. I hope you can help solve it. We basically used JLINK for debugging in the later stage.&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt; Thank you very much! &amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Nov 2021 09:04:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368422#M12696</guid>
      <dc:creator>ye_jiawei</dc:creator>
      <dc:date>2021-11-09T09:04:11Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368441#M12699</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ye_jiawei" target="_blank"&gt;Hi@ye_jiawei&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; I will report your questions to the AE team, and I will update you in time.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Thank you for your feedback.&lt;/P&gt;
&lt;P&gt;BR!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Jim,&lt;/P&gt;</description>
      <pubDate>Tue, 09 Nov 2021 09:30:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368441#M12699</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-11-09T09:30:16Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1368519#M12704</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Ok, thank you very much！&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Nov 2021 10:57:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1368519#M12704</guid>
      <dc:creator>ye_jiawei</dc:creator>
      <dc:date>2021-11-09T10:57:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1369032#M12717</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ye_jiawei" target="_blank"&gt;Hi@ye_jiawei&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; I communicated with members of the AE team that the routines in the IDE do not yet support J-LINK. It may be supported in the next version. If there is a new message, I will notify you via email.&lt;/P&gt;
&lt;P&gt;BR!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Jim,&lt;/P&gt;</description>
      <pubDate>Wed, 10 Nov 2021 07:23:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1369032#M12717</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2021-11-10T07:23:13Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1947030#M40540</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Can you please confirm whether S32K312 supports the segger fully as of now? and if so, the support related to S32K312 [ With FreeRTOS ] - where we can find?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Prakash V&lt;/P&gt;</description>
      <pubDate>Wed, 04 Sep 2024 08:21:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1947030#M40540</guid>
      <dc:creator>VPrakash</dc:creator>
      <dc:date>2024-09-04T08:21:36Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3</title>
      <link>https://community.nxp.com/t5/S32K/S32K3/m-p/1993605#M43228</link>
      <description>Hi, Please provide the support for Integrating the seggerview to enable the continuous recording through UART[S32K312 Platform] and tell me if it is supported for S32K312 platform with FREERtos enabled or not.</description>
      <pubDate>Wed, 13 Nov 2024 10:02:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3/m-p/1993605#M43228</guid>
      <dc:creator>VPrakash</dc:creator>
      <dc:date>2024-11-13T10:02:48Z</dc:date>
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