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    <title>topic Re: FS32K144 suffix selection problem in S32K</title>
    <link>https://community.nxp.com/t5/S32K/FS32K144-suffix-selection-problem/m-p/1331797#M11883</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/185692"&gt;@ldj979&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The S32K144 part is available in these two options: &lt;STRONG&gt;H&lt;/STRONG&gt; 80MHz and &lt;STRONG&gt;U&lt;/STRONG&gt; 112MHz (max CORE_CLK freq.)&lt;/P&gt;
&lt;P&gt;As &lt;STRONG&gt;L&lt;/STRONG&gt; is for S32K11x only and &lt;STRONG&gt;W&lt;/STRONG&gt; is for S32K14xW only.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1630327899418.png" style="width: 368px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/154518iC55F96D5FFC53C19/image-dimensions/368x127?v=v2" width="368" height="127" role="button" title="danielmartynek_0-1630327899418.png" alt="danielmartynek_0-1630327899418.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;The core clock (80MHz) must be generated by the internal PLL anyway at this frequency.&lt;/P&gt;
&lt;P&gt;So it does not matter what crystal you use.&lt;/P&gt;
&lt;P&gt;Note that the load capacitance depends on the crystal.&lt;/P&gt;
&lt;P&gt;Please refer to AN5426: Hardware Design Guidelines for S32K1xx&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
    <pubDate>Mon, 30 Aug 2021 13:03:47 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2021-08-30T13:03:47Z</dc:date>
    <item>
      <title>FS32K144 suffix selection problem</title>
      <link>https://community.nxp.com/t5/S32K/FS32K144-suffix-selection-problem/m-p/1331586#M11876</link>
      <description>&lt;P&gt;Dear NXP Community,&lt;/P&gt;&lt;P&gt;I have a question about selecting the F32K144 MCU.&lt;/P&gt;&lt;P&gt;Currently, FS32K144UAVLL 0N57U MCU is mounted on the s32k144 Eval board, and the maximum clock frequency is 160MHz.&lt;/P&gt;&lt;P&gt;I'm trying to design a customized board with the FS32k144 MCU,&lt;/P&gt;&lt;P&gt;but I'm going to use the FS32K144 series with a different suffix due to the lack of stock of the MCU.&lt;/P&gt;&lt;P&gt;Depending on the suffix, the maximum frequency of the F32k144 series varies from 48 MHz to 112 MHz to 80 MHz.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Currently, I am designing hardware based on the S32K144 Eval board I purchased,&lt;/P&gt;&lt;P&gt;so I designed the design based on the load capacitance 8pF on the external crystal side.&lt;/P&gt;&lt;P&gt;Is there any problem if I design using an S32k144 MCU with a different suffix and a different maximum clock frequency?&lt;/P&gt;</description>
      <pubDate>Mon, 30 Aug 2021 08:04:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FS32K144-suffix-selection-problem/m-p/1331586#M11876</guid>
      <dc:creator>ldj979</dc:creator>
      <dc:date>2021-08-30T08:04:09Z</dc:date>
    </item>
    <item>
      <title>Re: FS32K144 suffix selection problem</title>
      <link>https://community.nxp.com/t5/S32K/FS32K144-suffix-selection-problem/m-p/1331797#M11883</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/185692"&gt;@ldj979&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The S32K144 part is available in these two options: &lt;STRONG&gt;H&lt;/STRONG&gt; 80MHz and &lt;STRONG&gt;U&lt;/STRONG&gt; 112MHz (max CORE_CLK freq.)&lt;/P&gt;
&lt;P&gt;As &lt;STRONG&gt;L&lt;/STRONG&gt; is for S32K11x only and &lt;STRONG&gt;W&lt;/STRONG&gt; is for S32K14xW only.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1630327899418.png" style="width: 368px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/154518iC55F96D5FFC53C19/image-dimensions/368x127?v=v2" width="368" height="127" role="button" title="danielmartynek_0-1630327899418.png" alt="danielmartynek_0-1630327899418.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;The core clock (80MHz) must be generated by the internal PLL anyway at this frequency.&lt;/P&gt;
&lt;P&gt;So it does not matter what crystal you use.&lt;/P&gt;
&lt;P&gt;Note that the load capacitance depends on the crystal.&lt;/P&gt;
&lt;P&gt;Please refer to AN5426: Hardware Design Guidelines for S32K1xx&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 30 Aug 2021 13:03:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FS32K144-suffix-selection-problem/m-p/1331797#M11883</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2021-08-30T13:03:47Z</dc:date>
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