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    <title>topic Re: LPSPI Chip Select Frequency S32K144 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689152#M1142</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Vlad,&lt;/P&gt;&lt;P&gt;The SDK example uses blocking functions that wait for a transfer to be completed. The next transfer is then delayed because a new message needs to be prepared. It should depend on Bus frequency.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 01 Aug 2017 13:14:16 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2017-08-01T13:14:16Z</dc:date>
    <item>
      <title>LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689151#M1141</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to understand some specs regarding SPI functionality on S32K144 processor.&lt;/P&gt;&lt;P&gt;First, I have opened and ran the LPSPI example provided. Then displayed my CHIP SELECT signal to the oscilloscope.&lt;/P&gt;&lt;P&gt;After configuring and checking all data transmited via SPI, I see that no matter what settings I do (related to the baudrate of transmission, BUS clock and other parameter changes), the CHIP select signal always waits between 20us-30us between two succesive transmissions. Other way said, The CHIP SELECT signal is HIGH, data is transmitted, then it goes LOW for aprox 20-30us, then the next data is transmitted.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This has anything to do with the SPI settings, &amp;nbsp;or there are some interrupts used by Operating System (OSIF) to do something else between two consecutive transmissions?&lt;/P&gt;&lt;P&gt;I have attached some pictures (please check &lt;SPAN style="color: #222222; background-color: #fcfcfb; font-size: 14px;"&gt;&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;Δ&lt;/SPAN&gt;t value, at the bottom of graphic)&amp;nbsp;&lt;/SPAN&gt;.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="190546_190546.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/123103iD60AE6879CE98A8D/image-size/large?v=v2&amp;amp;px=999" role="button" title="190546_190546.jpg" alt="190546_190546.jpg" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="chip_select_LOW_period2.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/7946i45CBDF4221F349FA/image-size/large?v=v2&amp;amp;px=999" role="button" title="chip_select_LOW_period2.jpg" alt="chip_select_LOW_period2.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="190547_190547.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/123104iA93F946D22969156/image-size/large?v=v2&amp;amp;px=999" role="button" title="190547_190547.jpg" alt="190547_190547.jpg" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="chip_select_LOW_period1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/7987iD462A1F469967E16/image-size/large?v=v2&amp;amp;px=999" role="button" title="chip_select_LOW_period1.jpg" alt="chip_select_LOW_period1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339095"&gt;lpspi_transfer_example.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 31 Jul 2017 17:42:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689151#M1141</guid>
      <dc:creator>vladdamian</dc:creator>
      <dc:date>2017-07-31T17:42:16Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689152#M1142</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Vlad,&lt;/P&gt;&lt;P&gt;The SDK example uses blocking functions that wait for a transfer to be completed. The next transfer is then delayed because a new message needs to be prepared. It should depend on Bus frequency.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Aug 2017 13:14:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689152#M1142</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2017-08-01T13:14:16Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689153#M1143</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;Forgot to mention...&lt;/P&gt;&lt;P&gt;I have used the other method provided in the library. Also, I ran this transfer in DMA mode (for transferring with high speeds):&lt;/P&gt;&lt;P&gt;LPSPI_DRV_MasterTransfer(FSL_SEND, &amp;amp;masterDataSend, &amp;amp;masterDataReceive, BUFFER_SIZE);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So this function also uses some mechanisms for delays, in order to prepare for next message?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;PS: I have tested the code provided in the cookbook also. This is working as specified (1us delay between two transfers). I am working to configure this example to run at highest speed, in DMA mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Aug 2017 14:56:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689153#M1143</guid>
      <dc:creator>vladdamian</dc:creator>
      <dc:date>2017-08-01T14:56:43Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689154#M1144</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vlad,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you use the LPSPI example as it is?&lt;/P&gt;&lt;P&gt;If the answer is yes I think you observe that delay because each transfer is initiated after ADC conversion complete. If you want to evaluate only LPSPI driver I think you should remove ADC and PWM from this example and try to use higher buffer sizes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The highest frequency tested with LPSPI module is 20MHz in DMA mode and the example code will be available on the next release (EAR 0.8.5).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Razvan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Aug 2017 05:39:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689154#M1144</guid>
      <dc:creator>razva_tilimpea</dc:creator>
      <dc:date>2017-08-02T05:39:43Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689155#M1145</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Razvan,&lt;/P&gt;&lt;P&gt;No, I didn't used the example as it was.&lt;/P&gt;&lt;P&gt;1.) The measurement was done after I commented the code related to the ADC and PWM and left just the the LPSPI_DRV_MasterTransfer function inside the infinite loop.&lt;/P&gt;&lt;P&gt;2.) I have used the LPSPI_DRV_MasterTransfer function, which is without blocking.&amp;nbsp;&lt;/P&gt;&lt;P&gt;3.) I have tested various BUFFER_SIZEs.&lt;/P&gt;&lt;P&gt;What else should I try? Maybe I miss something obvious.&lt;/P&gt;&lt;P&gt;Thank you !&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Aug 2017 17:13:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689155#M1145</guid>
      <dc:creator>vladdamian</dc:creator>
      <dc:date>2017-08-03T17:13:54Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689156#M1146</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please share your project on this thread.&lt;/P&gt;&lt;P&gt;In you project did you use LPSPI_DRV_MasterSetDelay function? This function&amp;nbsp;can configure the parameters like delay between transfers.&lt;/P&gt;&lt;P&gt;Other observation is that is not a good idea to use non-blocking transfers in infinite loop because almost all transfers returns STATUS_BUSY.&lt;/P&gt;&lt;P&gt;For basic tests I used blocking transfers in while loops with various buffers sizes and I didn't observed this issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Razvan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Aug 2017 17:37:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689156#M1146</guid>
      <dc:creator>razva_tilimpea</dc:creator>
      <dc:date>2017-08-03T17:37:00Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689157#M1147</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have attached the project.&lt;/P&gt;&lt;P&gt;Is basically a demo code from examples with some minor modifications.&lt;/P&gt;&lt;P&gt;Thank you for help again !&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Aug 2017 11:33:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689157#M1147</guid>
      <dc:creator>vladdamian</dc:creator>
      <dc:date>2017-08-04T11:33:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689158#M1148</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I checked your project and that delay is caused by the overhead for set-up and finish a transfer.&lt;/P&gt;&lt;P&gt;Also, if you configure the lpspi at 5Mhz the interrupt mode is not suitable for for handling this transfer. Please use DMA.&lt;/P&gt;&lt;P&gt;If you want to enable the DMA please check this post:&amp;nbsp;&lt;A href="https://community.nxp.com/thread/456661"&gt;https://community.nxp.com/thread/456661&lt;/A&gt;&amp;nbsp;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Razvan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Aug 2017 15:34:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689158#M1148</guid>
      <dc:creator>razva_tilimpea</dc:creator>
      <dc:date>2017-08-04T15:34:54Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Chip Select Frequency S32K144</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689159#M1149</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Razvan,&lt;/P&gt;&lt;P&gt;Ok. will check and return with some feedback.&lt;/P&gt;&lt;P&gt;Thank you for help !&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Aug 2017 10:20:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Chip-Select-Frequency-S32K144/m-p/689159#M1149</guid>
      <dc:creator>vladdamian</dc:creator>
      <dc:date>2017-08-07T10:20:30Z</dc:date>
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