Problem initializing some GPIO pins but not others

cmarslett — Fri, 25 Jun 2021 15:09:21 GMT

I have taken the "Hello" sample code from the cookbook file and attempted to modify it to read 5 adjacent GPIO pins on the S32K144EVB-Q100 devkit.

Here is the initialization code I am using:

WDOG_disable();

* Enable clocks to peripherals (PORT modules) */
PCC-> PCCn[PCC_PORTA_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT A */
PCC-> PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT B */
PCC-> PCCn[PCC_PORTC_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT C */
PCC-> PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT D */
PCC-> PCCn[PCC_PORTE_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT E */

/* Configure port E9 as GPIO input (BTN 0 [SW2] on EVB) */
PTE->PIDR &= ~(1L<<9); /* Port E9: Input enable for pin 9 */
PTE->PDDR &= ~(1L<<9); /* Port E9: Data Direction=input for pin 9 */
PORTE->PCR[9] = 0x00000113L; /* Port E9: MUX = GPIO, input filter enabled, pulled up */

PTC->PIDR &= ~(1L<<5 | 1L<<4); /* Port C: Input enable for pins 5 and 4 */
PTC->PDDR &= ~(1L<<5 | 1L<<4); /* Port C: Data Direction=input for pins 5 and 4 */
/* Configure port C5 as GPIO input (BTN 0 [SW2] on EVB) */
PORTC->PCR[5] = 0x00000113L; /* Port C5: MUX = GPIO, input filter enabled, pulled up */
/* Configure port C4 as GPIO input (BTN 0 [SW2] on EVB) */
// This register setup fails (note that pin 5's setup worked)
PORTC->PCR[4] = 0x00000113L; /* Port C4: MUX = GPIO, input filter enabled, pulled up */

PTA->PIDR &= ~(1L<<10 | 1L<<4);
PTA->PDDR &= ~(1L<<10 | 1L<<4);
/* Configure port A10 as GPIO input (BTN 0 [SW2] on EVB) */
PORTA->PCR[10] = 0x00000113L; /* Port A10: MUX = GPIO, input filter enabled, pulled up */
/* Configure port A4 as GPIO input (BTN 0 [SW2] on EVB) */
// This register setup fails (note that pin 10's setup worked)
PORTA->PCR[4] = 0x00000113L; /* Port A4: MUX = GPIO, input filter enabled, pulled up */

The double slash comments above indicate the lines that generate bus faults (I've tried both the default -O1 and -O0 optimization levels, with no noticeable difference).

The lines of code I use to read the GPIO pins look like this:

if ((PTE->PDIR & (1<<9)) == 0) { /* If GPIO Input is 0, DOWN pushed) */

I am missing something in the initialization here. Any advice?

Re: Problem initializing some GPIO pins but not others

Robin_Shen — Mon, 28 Jun 2021 02:56:54 GMT

Hi cmarslett,

PTA4 and PTC4 are default as debug port(JTAG\SWD).

It is not recommended to modify the debugging port to GPIO, which will cause difficulties in debugging in the future.

Best Regards,
Robin
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topic Re: Problem initializing some GPIO pins but not others in S32K

Problem initializing some GPIO pins but not others

Re: Problem initializing some GPIO pins but not others