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    <title>S32K中的主题 SPI CS Flexio Configuration</title>
    <link>https://community.nxp.com/t5/S32K/SPI-CS-Flexio-Configuration/m-p/1298569#M11204</link>
    <description>&lt;P&gt;Hello Team&lt;/P&gt;&lt;P&gt;Need help in controlling Flexio CS line, CS line is configured as GPIO.&lt;/P&gt;&lt;P&gt;SPI Flexio master is enabled on S32k148, while&amp;nbsp; SPI slave is enabled on ST HW.&lt;/P&gt;&lt;P&gt;We have a requirement to control the SPI slave communication based on Flexio CS line.&lt;/P&gt;&lt;P&gt;Such that, if CS line is only then&amp;nbsp; data from&amp;nbsp; the&amp;nbsp; S32kMaster, should be process&amp;nbsp; else treat as timeout scenario.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are noticing that SPI CS line goes low after some delayed time.&lt;/P&gt;&lt;P&gt;0[04 02 14 E6 00 00 ]&amp;nbsp;&lt;/P&gt;&lt;P&gt;010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000&lt;/P&gt;&lt;P&gt;04 02 14 E6 00 00 &amp;lt;-- Payload packet to ST from S32k148&lt;/P&gt;&lt;P&gt;01 &amp;lt;-- Chip select line status of SPI Flexiomaster&lt;/P&gt;&lt;P&gt;00&amp;lt;-- Chip select line status of SPI Flexio master after certain time.&lt;/P&gt;&lt;P&gt;The intended request is let CS line is low for the entire Tx(S32k -&amp;gt; ST) and Rx(ST -&amp;gt; s32k) communication is complete. Since, CS line is becoming high as soon as TX being sent.. ST device is not sending any data to master considering communication has&amp;nbsp; lost as CS made high because of timeout.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Would request your support to help us know how CS line can controlled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Jayakumar Appari.&lt;/P&gt;</description>
    <pubDate>Fri, 25 Jun 2021 18:52:52 GMT</pubDate>
    <dc:creator>jaikumar81</dc:creator>
    <dc:date>2021-06-25T18:52:52Z</dc:date>
    <item>
      <title>SPI CS Flexio Configuration</title>
      <link>https://community.nxp.com/t5/S32K/SPI-CS-Flexio-Configuration/m-p/1298569#M11204</link>
      <description>&lt;P&gt;Hello Team&lt;/P&gt;&lt;P&gt;Need help in controlling Flexio CS line, CS line is configured as GPIO.&lt;/P&gt;&lt;P&gt;SPI Flexio master is enabled on S32k148, while&amp;nbsp; SPI slave is enabled on ST HW.&lt;/P&gt;&lt;P&gt;We have a requirement to control the SPI slave communication based on Flexio CS line.&lt;/P&gt;&lt;P&gt;Such that, if CS line is only then&amp;nbsp; data from&amp;nbsp; the&amp;nbsp; S32kMaster, should be process&amp;nbsp; else treat as timeout scenario.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are noticing that SPI CS line goes low after some delayed time.&lt;/P&gt;&lt;P&gt;0[04 02 14 E6 00 00 ]&amp;nbsp;&lt;/P&gt;&lt;P&gt;010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101010101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000&lt;/P&gt;&lt;P&gt;04 02 14 E6 00 00 &amp;lt;-- Payload packet to ST from S32k148&lt;/P&gt;&lt;P&gt;01 &amp;lt;-- Chip select line status of SPI Flexiomaster&lt;/P&gt;&lt;P&gt;00&amp;lt;-- Chip select line status of SPI Flexio master after certain time.&lt;/P&gt;&lt;P&gt;The intended request is let CS line is low for the entire Tx(S32k -&amp;gt; ST) and Rx(ST -&amp;gt; s32k) communication is complete. Since, CS line is becoming high as soon as TX being sent.. ST device is not sending any data to master considering communication has&amp;nbsp; lost as CS made high because of timeout.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Would request your support to help us know how CS line can controlled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Jayakumar Appari.&lt;/P&gt;</description>
      <pubDate>Fri, 25 Jun 2021 18:52:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SPI-CS-Flexio-Configuration/m-p/1298569#M11204</guid>
      <dc:creator>jaikumar81</dc:creator>
      <dc:date>2021-06-25T18:52:52Z</dc:date>
    </item>
    <item>
      <title>Re: SPI CS Flexio Configuration</title>
      <link>https://community.nxp.com/t5/S32K/SPI-CS-Flexio-Configuration/m-p/1299128#M11216</link>
      <description>&lt;P&gt;Hello Jayakumar,&lt;/P&gt;
&lt;P&gt;Where do you toggle the CS GPIO line in the code exactly?&lt;/P&gt;
&lt;P&gt;Do you use the SDK FlexIO SPI driver?&lt;/P&gt;
&lt;P&gt;If so, do you use blocking or non-blocking transfer functions?&lt;/P&gt;
&lt;P&gt;If I understand the issue, it could be because you use the non-blocking functions.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 28 Jun 2021 13:53:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SPI-CS-Flexio-Configuration/m-p/1299128#M11216</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2021-06-28T13:53:09Z</dc:date>
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