<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S32K11x FlexNVM constraints in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1276389#M10873</link>
    <description>&lt;P&gt;Thanks for confirming. I'll go over the code again to check what could be causing it.&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Stuart&lt;/P&gt;</description>
    <pubDate>Thu, 13 May 2021 11:26:01 GMT</pubDate>
    <dc:creator>f1_stu</dc:creator>
    <dc:date>2021-05-13T11:26:01Z</dc:date>
    <item>
      <title>S32K11x FlexNVM constraints</title>
      <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275086#M10844</link>
      <description>&lt;P&gt;We are using an S32K114 with FlexNVM in EEPROM mode with 2K RAM and D-FLASH.&lt;/P&gt;&lt;P&gt;We are not using&amp;nbsp;&lt;SPAN&gt;CSEc but may in the future.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;I am trying to understand&amp;nbsp;AN12003&lt;/P&gt;&lt;P&gt;(1) Operation&lt;/P&gt;&lt;P&gt;I believe that AN12003 informs me that we may run a program with interrupts enabled from P-FLASH whilst the FlexNVM state machine in erasing and writing to D-FLASH.&lt;/P&gt;&lt;P&gt;We may not however; read from or execute code from D-FLASH whilst the FlexNVM state machine is active.&lt;/P&gt;&lt;P&gt;Please confirm.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 11 May 2021 15:31:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275086#M10844</guid>
      <dc:creator>Pete66</dc:creator>
      <dc:date>2021-05-11T15:31:59Z</dc:date>
    </item>
    <item>
      <title>Re: S32K11x FlexNVM constraints</title>
      <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275112#M10845</link>
      <description>&lt;P&gt;Hi Pete,&lt;/P&gt;
&lt;P&gt;yes, your understanding is correct. There's also similar description in the reference manual:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1620752044150.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/144463iF227179F2B915A43/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1620752044150.png" alt="lukaszadrapa_0-1620752044150.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 11 May 2021 16:54:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275112#M10845</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2021-05-11T16:54:25Z</dc:date>
    </item>
    <item>
      <title>Re: S32K11x FlexNVM constraints</title>
      <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275573#M10861</link>
      <description>&lt;P&gt;Hi Lukas,&lt;/P&gt;&lt;P&gt;So just to clarify, as I've been working with the S32K116 and its EEEPROM implementation; for a system that is partitioned so that it has a region of FlexRAM and FlexNVM, with the FlexNVM area existing in a separate block (D/E) of flash i.e. distinct from P-Flash. If a write is made to the FlexRAM (which initiates the EEEPROM internal state machine), interrupts do &lt;EM&gt;not&lt;/EM&gt; have to be disabled, as long as the code that is executed concurrently doesn’t perform any operations on the E-Flash/FlexNVM region of flash memory - is that correct? It’s just that when I did some initial work on this, the software seemed to enter a trap if interrupts weren’t disabled when the EEE state machine initialised, so just wanted to check.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Stuart&lt;/P&gt;</description>
      <pubDate>Wed, 12 May 2021 10:38:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1275573#M10861</guid>
      <dc:creator>f1_stu</dc:creator>
      <dc:date>2021-05-12T10:38:27Z</dc:date>
    </item>
    <item>
      <title>Re: S32K11x FlexNVM constraints</title>
      <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1276387#M10872</link>
      <description>&lt;P&gt;Hi Stuart,&lt;/P&gt;
&lt;P&gt;yes, that's correct.&lt;/P&gt;
&lt;P&gt;Are you sure that your interrupt handlers or functions called by interrupt handlers do not access FlexNVM/EEE?&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 13 May 2021 11:17:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1276387#M10872</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2021-05-13T11:17:42Z</dc:date>
    </item>
    <item>
      <title>Re: S32K11x FlexNVM constraints</title>
      <link>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1276389#M10873</link>
      <description>&lt;P&gt;Thanks for confirming. I'll go over the code again to check what could be causing it.&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Stuart&lt;/P&gt;</description>
      <pubDate>Thu, 13 May 2021 11:26:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K11x-FlexNVM-constraints/m-p/1276389#M10873</guid>
      <dc:creator>f1_stu</dc:creator>
      <dc:date>2021-05-13T11:26:01Z</dc:date>
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  </channel>
</rss>

