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    <title>topic Re: FFT and complex mtrix processing capabilities on top NXP S32R/V in S32K</title>
    <link>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1262345#M10562</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/77934"&gt;@GaryRK&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your comments.&lt;/P&gt;&lt;P&gt;Could you please share with me the MIPI-CSI2&amp;nbsp;Characterization such as the numbers of lanes per port, the bandwidth of each line?&lt;/P&gt;&lt;P&gt;I really appreciated your assistance, Thanks n advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Shai&lt;/P&gt;</description>
    <pubDate>Thu, 15 Apr 2021 15:37:44 GMT</pubDate>
    <dc:creator>shai_b</dc:creator>
    <dc:date>2021-04-15T15:37:44Z</dc:date>
    <item>
      <title>FFT and complex mtrix processing capabilities on top NXP S32R/V</title>
      <link>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1260711#M10522</link>
      <description>&lt;P&gt;Hello Team&lt;/P&gt;&lt;P&gt;I have a customer who developing a radar (based TI chipset) cascading device up to 4 devices (72ch,).&lt;/P&gt;&lt;P&gt;the customer would like to have the following processing capabilities with the required&amp;nbsp;benchmarks.&lt;/P&gt;&lt;P&gt;Please advise what is the best suitable S32R/V SoC accordingly:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-left" image-alt="process_cap.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/142045i48E915D8AD633E7B/image-size/large?v=v2&amp;amp;px=999" role="button" title="process_cap.png" alt="process_cap.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I was thinking to offer S32R45 which has 4ch. of MIPI-CSI2 with&amp;nbsp;Linear algebra accelerator that could suit their needs, waiting for your kind recommendation?&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Shai&lt;/P&gt;</description>
      <pubDate>Mon, 12 Apr 2021 18:29:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1260711#M10522</guid>
      <dc:creator>shai_b</dc:creator>
      <dc:date>2021-04-12T18:29:40Z</dc:date>
    </item>
    <item>
      <title>Re: FFT and complex mtrix processing capabilities on top NXP S32R/V</title>
      <link>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1261372#M10543</link>
      <description>&lt;P&gt;Hello Shai,&lt;/P&gt;
&lt;P&gt;S32R45 is indeed the most suitable device for that use-case. From connectivity perspective it is the only one capable of interfacing with 4 MMIC devices since it has 4 * CSI2 interfaces and multiple SPI/I2C/Ethernet. From processing capability perspective it exceeds those expectations comfortably.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Gary&lt;/P&gt;</description>
      <pubDate>Tue, 13 Apr 2021 14:51:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1261372#M10543</guid>
      <dc:creator>GaryRK</dc:creator>
      <dc:date>2021-04-13T14:51:50Z</dc:date>
    </item>
    <item>
      <title>Re: FFT and complex mtrix processing capabilities on top NXP S32R/V</title>
      <link>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1262345#M10562</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/77934"&gt;@GaryRK&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your comments.&lt;/P&gt;&lt;P&gt;Could you please share with me the MIPI-CSI2&amp;nbsp;Characterization such as the numbers of lanes per port, the bandwidth of each line?&lt;/P&gt;&lt;P&gt;I really appreciated your assistance, Thanks n advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Shai&lt;/P&gt;</description>
      <pubDate>Thu, 15 Apr 2021 15:37:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FFT-and-complex-mtrix-processing-capabilities-on-top-NXP-S32R-V/m-p/1262345#M10562</guid>
      <dc:creator>shai_b</dc:creator>
      <dc:date>2021-04-15T15:37:44Z</dc:date>
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