topic Re: About the S32K146 FTM input capture filter function in S32K

About the S32K146 FTM input capture filter function

ByteWord — Mon, 15 Mar 2021 08:23:09 GMT

Problems with FTM input capture filtering

1.FTM1 is in input capture mode

2.FTIM1 input clk = 80MHz/128 = 625KHz

3.FTM1.SC.FLTPS = 15 (Divide by 16, filter clk = 625KHz/16 ≈ 40KHz)

4.FTM1.FILTER.CH0FVAL = 15

So,

Filtering time = 4 rising edges of FTM input clock+(1 + 4 × CHnFVAL[3:0]) rising edges of FTM filter clock

= 4/625KHz + (1 + 4*15)/40KHz = 6.4us + 1525us ≈ 1530us

If the input PWM signal frequency is 10kHz and the duty cycle is 50%, then the high level time is 50us;

If the filtering time is 1.53ms, the pulse should not be detected;But I can still detect the pulse;I don't know where I went wrong;

Re: About the S32K146 FTM input capture filter function

danielmartynek — Mon, 15 Mar 2021 12:31:47 GMT

Hi,

I took some tests and it works, the calculation seems to be correct, but the FTM filter clock is derived from the FTM System clock not from the FTM function clock (RM rev12.1, Table 27-9. Peripheral module clocking).

Regards,

Daniel

Re: About the S32K146 FTM input capture filter function

ByteWord — Tue, 16 Mar 2021 02:46:48 GMT

hi,thanks for your reply.Your reply has solved my problem.

"the FTM filter clock is derived from the FTM System clock not from the FTM function clock " help me a lot.

For me, the correct formula for filtering time would look something like this :

filtering clk= FTM sys clk/16 = 80MHz/16 = 5MHz

FTM input clk = 80MHz/128 = 625KHz

filtering time = 4 rising edges of FTM input clock+(1 + 4 × CHnFVAL[3:0]) rising edges of FTM filter clock

= 4/625KHz + (1 + 4*15)/5MHz = 18.6us

Therefore, it can detect pulses with a pulse width of 50us;

Thank you again!

Re: About the S32K146 FTM input capture filter function

xxw1 — Wed, 23 Aug 2023 06:40:46 GMT

i have a same confusion like him,the input capture filter do not work.

Re: About the S32K146 FTM input capture filter function

xxw1 — Wed, 23 Aug 2023 06:51:49 GMT

void FTM1_init(void)

{

PCC->PCCn[PCC_FTM1_INDEX] &= ~PCC_PCCn_CGC_MASK;

PCC->PCCn[PCC_FTM1_INDEX] |= PCC_PCCn_PCS(0b010)

| PCC_PCCn_CGC_MASK;

FTM1->MODE |= FTM_MODE_WPDIS_MASK;

FTM1->SC |= FTM_SC_PS(7); //Prescale Factor Selection

FTM1->SC |= FTM_SC_FLTPS(0b1111); //FLTPS[3:0] ≠ 0

FTM1->FILTER |= FTM_FILTER_CH1FVAL(0b1111);//CHnFVAL[3:0] ≠ 0

FTM1->COMBINE = 0x00000000;

FTM1->POL = 0x00000000;

}

according to Table 47-7. FTM Channel Input Filter Delay,register set as below FTM_SC_FLTPS(0b1111);FTM_FILTER_CH1FVAL(0b1111);

it means the delay time can calculate as -> 4 rising edges of FTM input clock + (1 + 4 × CHnFVAL[3:0]) rising edges of FTM filter clock.

FTM input clock:8HMhz(fixed freq)/128 divide=62.5Khz;

FTM filter clock:sys clk(80Mhz)/16 divide = 5Mhz;

delay time = 4/62.5KHz+61/5Mhz=64us+12.2us=76.2us;

In fact,the input capture can detect 16us period PWM.

Re: About the S32K146 FTM input capture filter function

xxw1 — Wed, 23 Aug 2023 06:56:49 GMT

hello,i'm struggle in the same problem and can i consult it with you