S32G中的主题 Re: S32G3 MultiCore Startup

S32G3 MultiCore Startup

jiajun — Fri, 31 May 2024 07:55:52 GMT

Hi,all:

I have some questions about using the S32G3 development board:
The "Platform_Multicore_SingleElf_Example_S32G3XX" routine in the current S32G3 SDK demonstrates two Cortex-m7s running at the same time, and my question is, I know CM7_0 is running by default, so how does CM7_1 run; what I see in the code is that the api "OsIf_GetCoreID" determines which core is currently running, so how does Cm7_1 run?

@chenyin_h @Daniel-Aguirre

Re: S32G3 MultiCore Startup

Daniel-Aguirre — Fri, 31 May 2024 15:11:26 GMT

Hi,

Can you let us know where are you able to find the "Platform_Multicore_SingleElf_Example_S32G3XX" example? For the available examples under the RTD we are unable to locate the specific example.

Please, let us know.

Re: S32G3 MultiCore Startup

jiajun — Mon, 03 Jun 2024 01:03:45 GMT

Hi,

In"C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32XX_4_0_0\RTD\Platform_TS_T40D11M40I2R0\examples\S32DS\S32G3\Platform_Multicore_SingleElf_Example_S32G3XX",Or you can simply and I explain after powering up the next CM7_0 is how to wake up CM7_1, I am currently in the “S32G3 Reference Manual.pdf” this document inside only see the enable clock, but did not see the enable core.

Re: S32G3 MultiCore Startup

Daniel-Aguirre — Mon, 03 Jun 2024 13:46:11 GMT

Hi,

Thanks for your feedback.

Overall, on regards of multicore applications, M7_0 (in this particular case) should provide the start address of M7_1 to the MC_ME module, then deassert the RST of M7_1. More information is available under the S32G3 RM [Page 1258, S32G3 Reference Manual, Rev. 4, 02/2024]:

Also, on regards of the example, the code for setting/starting up M7_1 from M7_0 is provided under the system.c file, as follows:

Please, let us know.

Re: S32G3 MultiCore Startup

jiajun — Mon, 03 Jun 2024 15:04:44 GMT

Hi,

Thank you for your reply, but I still have some questions:
1. In this example of the function "Sys_StartSecondaryCores", the macro definition START_CM7_1 is not defined, so how to go about the next steps.
2. According to your explanation just now and the content of the reference manual, can I understand that CM7_1 is enabled by CM7_0, and only the CM7_1 starting address and clock configuration are provided in CM7_0, and then the reset is completed
3. Enabling CM7_2 is the same step as enabling CM7_1

Re: S32G3 MultiCore Startup

Daniel-Aguirre — Mon, 03 Jun 2024 18:02:30 GMT

Hi,

Thanks for your feedback.

Below will be some comments on regards of your questions:

1. In this example of the function "Sys_StartSecondaryCores", the macro definition START_CM7_1 is not defined, so how to go about the next steps.

[DA]I: t does seem to be that the enablement of the M7_1 is being done under the Mcu_SetMode(McuModeSettingConf_0); function. This given the following configuration under the Mcu peripheral:

2. According to your explanation just now and the content of the reference manual, can I understand that CM7_1 is enabled by CM7_0, and only the CM7_1 starting address and clock configuration are provided in CM7_0, and then the reset is completed

3. Enabling CM7_2 is the same step as enabling CM7_1

[DA]: We might be misunderstanding, if so we do apologize.

In general, as seen under the flow chart of the RM, you need to provide an address, enable the clock then deassert the reset of the respective core. This enablement flow is the same for all the available cores inside the S32G3 chip [Page 1256, S32G3 Reference Manual, Rev. 4, 02/2024]:

"This sequence can be used to turn on the Cortex-M7 application cores or the Cortex-A53 cluster cores."

Please, let us know.

Re: S32G3 MultiCore Startup

jiajun — Tue, 04 Jun 2024 06:00:08 GMT

Hi,

According to your description CM7_1 initialization is done in this function "Mcu_SetMode(McuModeSettingConf_0)", then what are the two parameters "CM7_0 Under MCU Control & CM7_0 Core Clock Enable"? What do these two parameters mean, check or don't check respectively represent what function, please explain, thank you!

Re: S32G3 MultiCore Startup

Daniel-Aguirre — Tue, 04 Jun 2024 12:56:19 GMT

Hi,

For more information on regards of available configurations of the MCU peripheral, help us look into the following path:

C:/nxp/S32DS.3.5/S32DS/software/PlatformSDK_S32XX_4_0_0/RTD/Mcu_TS_T40D11M40I0R0/doc/

In which you should find both the User Manual (UM) and Integration Manual (IM). In there, you should find the description of the settings you are asking.

You could also hover over the setting, and it should provide more information on regards of the usage of that specific configuration.

Please, let us know.

Re: S32G3 MultiCore Startup

jiajun — Wed, 05 Jun 2024 01:22:43 GMT

Hi,Daniel:

Thanks for the advice, I'll go through both documents carefully,谢谢