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    <title>topic Some problems about multicore in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Some-problems-about-multicore/m-p/1437580#M675</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have a project with multicore,if I download the elf with debugger,three cores will all work well,&lt;/P&gt;&lt;P&gt;but I use IVT to boot the application from external NorFlash,Core0 is normal,Core1 and Core2 will bus error when the two cores access the SRAM,can someone give me some advice?&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
    <pubDate>Fri, 01 Apr 2022 10:26:53 GMT</pubDate>
    <dc:creator>qdv5</dc:creator>
    <dc:date>2022-04-01T10:26:53Z</dc:date>
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      <title>Some problems about multicore</title>
      <link>https://community.nxp.com/t5/S32G/Some-problems-about-multicore/m-p/1437580#M675</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have a project with multicore,if I download the elf with debugger,three cores will all work well,&lt;/P&gt;&lt;P&gt;but I use IVT to boot the application from external NorFlash,Core0 is normal,Core1 and Core2 will bus error when the two cores access the SRAM,can someone give me some advice?&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Fri, 01 Apr 2022 10:26:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Some-problems-about-multicore/m-p/1437580#M675</guid>
      <dc:creator>qdv5</dc:creator>
      <dc:date>2022-04-01T10:26:53Z</dc:date>
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