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    <title>topic Please tell me about cache settings. in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Please-tell-me-about-cache-settings/m-p/1832942#M6346</link>
    <description>&lt;P&gt;Please tell me about cache settings.&lt;/P&gt;&lt;P&gt;Can cache be enabled or disabled for each memory? .&lt;/P&gt;&lt;P&gt;Which memory cache is enabled in the sample project "Can_Llce_DS_Can2Can_S32G399A_M7"?&lt;BR /&gt;Also, is it possible to enable or disable caching? Please tell me the steps if possible.&lt;/P&gt;</description>
    <pubDate>Thu, 21 Mar 2024 12:36:54 GMT</pubDate>
    <dc:creator>kazuki</dc:creator>
    <dc:date>2024-03-21T12:36:54Z</dc:date>
    <item>
      <title>Please tell me about cache settings.</title>
      <link>https://community.nxp.com/t5/S32G/Please-tell-me-about-cache-settings/m-p/1832942#M6346</link>
      <description>&lt;P&gt;Please tell me about cache settings.&lt;/P&gt;&lt;P&gt;Can cache be enabled or disabled for each memory? .&lt;/P&gt;&lt;P&gt;Which memory cache is enabled in the sample project "Can_Llce_DS_Can2Can_S32G399A_M7"?&lt;BR /&gt;Also, is it possible to enable or disable caching? Please tell me the steps if possible.&lt;/P&gt;</description>
      <pubDate>Thu, 21 Mar 2024 12:36:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Please-tell-me-about-cache-settings/m-p/1832942#M6346</guid>
      <dc:creator>kazuki</dc:creator>
      <dc:date>2024-03-21T12:36:54Z</dc:date>
    </item>
    <item>
      <title>Re: Please tell me about cache settings.</title>
      <link>https://community.nxp.com/t5/S32G/Please-tell-me-about-cache-settings/m-p/1833105#M6351</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Can you help us elaborate more on the following question:&lt;/P&gt;
&lt;P&gt;"&lt;SPAN&gt;Can cache be enabled or disabled for each memory?&lt;/SPAN&gt;"&lt;/P&gt;
&lt;P&gt;To which memories are you referring?&lt;/P&gt;
&lt;P&gt;As for the general cache configurations (under the M7 core), we understand that D_CACHE and I_CACHE is enabled on all NXP examples. You can verify this under the&amp;nbsp;&lt;EM&gt;Properties &amp;gt; C/C++ Build &amp;gt; Setting &amp;gt; Standard S32DS C Compiler &amp;gt; Preprocessor&lt;/EM&gt;:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1711039368322.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/269820i254E6F2E7945D15F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1711039368322.png" alt="DanielAguirre_0-1711039368322.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Thu, 21 Mar 2024 16:43:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Please-tell-me-about-cache-settings/m-p/1833105#M6351</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2024-03-21T16:43:03Z</dc:date>
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