<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Benchmarking IPCF Timing Options M7 in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1410470#M501</link>
    <description>&lt;P&gt;What time granularity do you expect? The STM module could provide the shortest &lt;BR /&gt;time duration step of about 7.5ns (If the reference &lt;BR /&gt;clock of the STM is 133MHz and the module clock divider is 1). In free running &lt;BR /&gt;mode, the duration from 0x0000_0000 to 0xFFFF_FFFF will be more than 30s. If &lt;BR /&gt;that matches your requirements, I would like to suggest &lt;BR /&gt;using any STM available to provide the timing ticks.&lt;/P&gt;
&lt;P&gt;To reduce the time consumption of the code, you can simply enable any STM in &lt;BR /&gt;free running mode and take that STM counter as timestamp source. &lt;BR /&gt;Then both A53 or M7 can read the same counter in any time with the &lt;BR /&gt;simplest bare metal code.&lt;/P&gt;
&lt;P&gt;Hope this helps,&lt;BR /&gt;Platon&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 08 Feb 2022 18:01:30 GMT</pubDate>
    <dc:creator>bpe</dc:creator>
    <dc:date>2022-02-08T18:01:30Z</dc:date>
    <item>
      <title>Benchmarking IPCF Timing Options M7</title>
      <link>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407317#M484</link>
      <description>&lt;P&gt;Hi there,&lt;/P&gt;&lt;P&gt;I want to benchmark IPCF shared memory communication and wonder what timing options are available in M7 bare metal application. The M7 firmware will be started via U-Boot which already initializes the clock. Can you give some advice on how to best benchmark something like this in software?&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;What timer drivers API should I be looking into?&lt;/LI&gt;&lt;LI&gt;How to get system tick and system clock freq?&lt;/LI&gt;&lt;LI&gt;I'm following NXP IPCF example for A53 Linux and M7 bare metal app&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Mon, 31 Jan 2022 22:07:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407317#M484</guid>
      <dc:creator>kawin</dc:creator>
      <dc:date>2022-01-31T22:07:33Z</dc:date>
    </item>
    <item>
      <title>Re: Benchmarking IPCF Timing Options M7</title>
      <link>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407580#M486</link>
      <description>&lt;P&gt;&lt;BR /&gt;If you want to measure various routines execution time, the recommended approach &lt;BR /&gt;is to use S32 Development Studio Tracing and Analysis tool. This GUI tool utilizes &lt;BR /&gt;the processor internal performance counters and other dedicated HW not visible&lt;BR /&gt;to the user. See S32 Design Studio Tracing and Analysis User Guide for details.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;BR /&gt;Platon&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 01 Feb 2022 13:11:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407580#M486</guid>
      <dc:creator>bpe</dc:creator>
      <dc:date>2022-02-01T13:11:10Z</dc:date>
    </item>
    <item>
      <title>Re: Benchmarking IPCF Timing Options M7</title>
      <link>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407691#M487</link>
      <description>&lt;P&gt;One of the metrics that I'm interested in is the one-way interrupt latency between Linux A53 app and M7 firmware. This is how I think something like this can be measured:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Output&amp;nbsp;&lt;EM&gt;timestamp start&lt;/EM&gt; before A53 write the first byte&lt;/LI&gt;&lt;LI&gt;Output&amp;nbsp;&lt;EM&gt;timestamp end&lt;/EM&gt; when the RX interrupt routine of M7 is triggered&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Can I get some guidance on the what clock to use to synchronize the time between A53 and M7 applications?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;</description>
      <pubDate>Tue, 01 Feb 2022 17:40:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1407691#M487</guid>
      <dc:creator>kawin</dc:creator>
      <dc:date>2022-02-01T17:40:57Z</dc:date>
    </item>
    <item>
      <title>Re: Benchmarking IPCF Timing Options M7</title>
      <link>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1410470#M501</link>
      <description>&lt;P&gt;What time granularity do you expect? The STM module could provide the shortest &lt;BR /&gt;time duration step of about 7.5ns (If the reference &lt;BR /&gt;clock of the STM is 133MHz and the module clock divider is 1). In free running &lt;BR /&gt;mode, the duration from 0x0000_0000 to 0xFFFF_FFFF will be more than 30s. If &lt;BR /&gt;that matches your requirements, I would like to suggest &lt;BR /&gt;using any STM available to provide the timing ticks.&lt;/P&gt;
&lt;P&gt;To reduce the time consumption of the code, you can simply enable any STM in &lt;BR /&gt;free running mode and take that STM counter as timestamp source. &lt;BR /&gt;Then both A53 or M7 can read the same counter in any time with the &lt;BR /&gt;simplest bare metal code.&lt;/P&gt;
&lt;P&gt;Hope this helps,&lt;BR /&gt;Platon&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 08 Feb 2022 18:01:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Benchmarking-IPCF-Timing-Options-M7/m-p/1410470#M501</guid>
      <dc:creator>bpe</dc:creator>
      <dc:date>2022-02-08T18:01:30Z</dc:date>
    </item>
  </channel>
</rss>

