topic 回复： RMII & Fixed-link under PFE TX OK but RX NG in S32G

RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Wed, 23 Aug 2023 09:57:31 GMT

Hi there，

We want to connect a 5G modules call by AG551 through RMII under PFE like blow image,

ping AG551 from S32G274A , the ARP packet send to AG551 is OK(tcpdump shows), but the ARP answer, but the response cannot be returned from AG551 to S32G274A.

here are our dts

S32G274A

diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi index e1fbd28bb..f5c585bd4 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi @@ -72,8 +72,11 @@ }; &pfe_netif2 { - phy-mode = "rgmii-id"; - phy-handle = <&pfe_mdio_b_phy4>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; };

AG551

ethqos_hw: qcom,ethernet@00020000 { compatible = "qcom,sdxprairie-ethqos"; qcom,arm-smmu; //emac-phy-addr = <7>; //Mars.Chen 20210624 find external PHY addr by scan 0 to 31,not set by dtsi reg = <0x20000 0x10000>, <0x36000 0x100>, <0xf100000 0x300000>; reg-names = "stmmaceth", "rgmii","tlmm-central-base"; clocks = <&clock_gcc GCC_ETH_AXI_CLK>, <&clock_gcc GCC_ETH_SLAVE_AHB_CLK>, <&clock_gcc GCC_ETH_PTP_CLK>, <&clock_gcc GCC_ETH_RGMII_CLK>; clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; snps,ptp-ref-clk-rate = <230400000>; snps,ptp-req-clk-rate = <57600000>; //interrupts-extended = <&pdc 0 62 4>, <&pdc 0 60 4>, interrupts-extended = <&pdc 0 62 4>, //Mars.chen 2021-06-15 <&tlmm 90 2>, <&pdc 0 290 1>, <&pdc 0 291 1>; //interrupt-names = "macirq", "eth_lpi", interrupt-names = "macirq", //Mars.chen 2021-06-15,repair eth_lpi irq storm cause sytstem dump "phy-intr", "ptp_pps_irq_0", "ptp_pps_irq_1"; //eth_lpi irq only about PHY IEEE function,now not use it snps,crc_strip; qcom,msm-bus,name = "emac"; qcom,msm-bus,num-cases = <5>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <98 512 0 0>, <1 781 0 0>, /* No vote */ <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ <98 512 250000 0>, <1 781 0 40000>, /* 1000Mbps vote */ <98 512 250000 0>, <1 781 0 400000>; /* Nominal vote */ qcom,bus-vector-names = "0", "10", "100", "1000", "Nominal"; snps,tso; snps,pbl = <32>; mac-address = [00 55 7B B5 7D f7]; rx-fifo-depth = <16384>; tx-fifo-depth = <20480>; snps,mtl-rx-config = <&mtl_rx_setup>; snps,mtl-tx-config = <&mtl_tx_setup>; vreg_rgmii-supply = <&pmxprairie_vref_rgmii>; vreg_emac_phy-supply = <&vreg_emac_phy>; vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>; gdsc_emac-supply = <&gdsc_emac>; qcom,phy-intr-redirect = <&tlmm 90 GPIO_ACTIVE_LOW>; //Mars 2020/11/23,PPS-0 & PPS-1 not use,release gpio106 & gpio95 //pinctrl-names = "dev-emac_pin_pps_0", "dev-emac_pin_pps_1"; //pinctrl-0 = <&emac_pin_pps_0>; //pinctrl-1 = <&emac_pin_pps_1>; //Mars.chen 2022-05-24,if customer want AG55x control PHY power,can configure by [quec,phy-pwren-gpio] //quec,phy-pwren-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; snps,reset-gpio = <&tlmm 91 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <0 11000 70000>; phy-mode = "rgmii"; ethqos_emb_smmu: ethqos_emb_smmu { compatible = "qcom,emac-smmu-embedded"; iommus = <&apps_smmu 0x1c0 0xf>; qcom,iova-mapping = <0x80000000 0x0FE40000>; qcom,smmu-fastmap; qcom,smmu-geometry; }; io-macro-info { prg-rclk-dly = <1500>; }; }; ... &ethqos_hw { /delete-property/ vreg_rgmii-supply; //Mars 2020/11/23,PPS-0 & PPS-1 not use,release gpio106 & gpio95 // pinctrl-names = "default", // "dev-emac_pin_pps_0", // "dev-emac_pin_pps_1"; pinctrl-0 = <&vreg_rgmii_off_default>; //Mars.chen 2021-06-18,change for vddio support 1.8v // pinctrl-1 = <&emac_pin_pps_0>; // pinctrl-2 = <&emac_pin_pps_1>; qcom,phy-reset-delay-msecs = <10>; ipa-dma-rx-desc-cnt = <512>; ipa-dma-tx-desc-cnt = <512>; rgmii-tx-drv-str-clk = <16>; rgmii-tx-drv-str-data = <16>; rgmii-tx-drv-str-ctl = <16>; };

Could you tell us the reason and how to fix it?

Thank you

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Wed, 23 Aug 2023 15:14:32 GMT

S32G Log

root@s32g274ardb2:~# ping 192.168.100.100
PING 192.168.100.100 (192.168.100.100) 56(84) bytes of data.
From 192.168.100.101 icmp_seq=1 Destination Host Unreachable
From 192.168.100.101 icmp_seq=2 Destination Host Unreachable
From 192.168.100.101 icmp_seq=3 Destination Host Unreachable
^C
--- 192.168.100.100 ping statistics ---
6 packets transmitted, 0 received, +3 errors, 100% packet loss, time 5104ms

AG55 capture log

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Thu, 24 Aug 2023 16:10:23 GMT

Also, since the Quectel FAE told us that we can adjust the RGMII delay time, could you tell me how to change it, thank you.

回复： RMII & Fixed-link under PFE TX OK but RX NG

MayanksPatel — Fri, 25 Aug 2023 09:14:11 GMT

Hi @StanleyShen,

Can you please elaborate more on the RGMII Delay Time? What delay do you need to change?

Also, have you checked that the Quectel module is connected and IP assigned to it?

Thanks,

Mayank S Patel

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Fri, 25 Aug 2023 13:53:50 GMT

Dear @MayanksPatel

Can you please elaborate more on the RGMII Delay Time? What delay do you need to change?

I want to change Delay Tiem to 2ns, but at present, I don't know if modifying the delay time can solve my problem, and whether to modify the delay time of RGMII or PFE.

Also, have you checked that the Quectel module is connected and IP assigned to it?

Yes, I manually set the IP of AG55 to 192.168.1.100：

===================== Ping from S32G274A to Quectel ====================

Quectel module side:

S32G274A side:

===================== Ping from Quectel to S32G274A ====================

S32G274A side:

Quectel module side:

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Mon, 28 Aug 2023 09:10:27 GMT

Dear @MayanksPatel

Today, we have analysed the GRMII logic by saleae tool,

It seem that the nxp receive NG, could you tell us the reason?

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Wed, 30 Aug 2023 15:33:05 GMT

Can somebody help me?

回复： RMII & Fixed-link under PFE TX OK but RX NG

MayanksPatel — Thu, 31 Aug 2023 09:40:28 GMT

Hi @StanleyShen,

I have created a ticket with the internal team. I will get back to you on this.

Thank you for your patience.

Thanks,

Mayank S Patel

回复： RMII & Fixed-link under PFE TX OK but RX NG

MayanksPatel — Mon, 04 Sep 2023 07:02:10 GMT

Hi @StanleyShen,

Thank you for your patience.

The root cause of this issue is PFE MAC2 RX clock from the 5G module is not ready While initializing the PFE-related clock, the PFE_MAC2 RX clock is out of lock.

Temp workaround:

Load the PFE Linux driver after the 5G module is functional(Wait for the RX clock from the 5G module to be stable).

Hope this helps.

Thanks,

Mayank S Patel

回复： RMII & Fixed-link under PFE TX OK but RX NG

yanglei666888 — Wed, 20 Sep 2023 03:40:31 GMT

The PFE of my board is connected to the sja1105 switch. The device tree of Linux DSA driver requires the cpu port to be configured, so the PFE must be initialized first. the PFE_MAC RX clock is out of lock .How do I configure it correctly?

&spi1 {
spi-num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";

sja1105q_A@0 {
compatible = "nxp,sja1105q";
spi-max-frequency = <0x3D0900>;
spi-cpha;
fsl,spi-cs-sck-delay = <1>;
fsl,spi-sck-cs-delay = <1>;

reg = <0>;
soft-cs-gpio = <&pcal6524B 17 0>;
reset-gpio = <&pcal6524B 16 0>;
dsa,member = < 0 0 >;

ports {
#address-cells = <1>;
#size-cells = <0>;
switchAp0: port@0 {
ethernet = <&pfe_netif1>;
phy-mode = "rgmii-id";
label = "cpu";
reg = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};

switchAp1:port@1 {
phy-handle = <&mdio_a_phy_A1>;
phy-mode = "rgmii-id";
label = "Sw_A_p1";
reg = <1>;
};

switchAp2: port@2 {
phy-handle = <&mdio_a_phy_A2>;
phy-mode = "rgmii-id";
label = "Sw_A_p2";
reg = <2>;
};

switchAp3: port@3 {
phy-handle = <&mdio_a_phy_A3>;
phy-mode = "rgmii-id";
label = "Sw_A_p3";
reg = <3>;
};

switchAp4: port@4 {
phy-mode = "rgmii";
label = "Sw_A_p4";
reg = <4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

回复： RMII & Fixed-link under PFE TX OK but RX NG

StanleyShen — Wed, 20 Sep 2023 11:52:33 GMT

Hi @MayanksPatel

Thank you for you replay.

Previously, we also found this situation and resolved it using the same method.

Thank you again

回复： RMII & Fixed-link under PFE TX OK but RX NG

MayanksPatel — Fri, 22 Sep 2023 02:55:24 GMT

Hi @yanglei666888,

Please raise a new ticket for the queries.

Thanks,

Mayank S Patel