topic Re: CLKOUT0 configuration in S32G

CLKOUT0 configuration

GaryLiu — Tue, 18 Jan 2022 08:24:26 GMT

Dear sir,

We want to set the pin PF_03(83 SIUL2 0) as CLKOUT0 and generate a 500KHz clock to it.
I've research the document S32G2 Reference Manual.pdf

Following is what I understand by chapter 23.1.2.6.1 CLKOUT n clock configuration.
1.
We should config the MSCR83. (address=4009_C38C)

bit21(OBE) set 1 as output driver enabled
bit14(SRE) set 110b <- this is not sure which one we should select
bit13(PUE) set 1 as push/pull enable
bit12(PUS) set 1 for pull up
bit0(SSS) set 001 for select CLKOUT0

if the CLKOUT0 is not opendrain, we should set push/pull by setting PUE and PUS as 1, am I right?

2.
We should config the Clock Mux 1 Divider 0 Control Register (MUX_1_DC_0)
Address is MC_CGM_0 base address: 4003_0000h, offset 0x348

bit31(DE) set 1 for Divider enabled
bit16(DIV) set 0x50 for 500KHz (40MHz / 0x50 = 500KHz if it can providing 40MHz)

Do I have misunderstanding for our propose from the document?
If it is correct procedure, Could you guide us how to implement it by using the device tree way? Appreciate.

Thanks,
BRs,
Gary

Re: CLKOUT0 configuration

GaryLiu — Tue, 18 Jan 2022 08:31:30 GMT

Our board version is s32g274ardb2, and source code base on bsp30.0 linux 5.10.41.

Re: CLKOUT0 configuration

Bulat — Wed, 19 Jan 2022 11:50:47 GMT

PUE and PUS bits are not needed in your case, keep these as '0'.

SRE defines slew rate of the output buffer, and consequently maximum output frequency. Numbers for maximum output frequency for each SRE value can be found in the ref manual.

Other calculations of registers values are correct and correspond to your task.

Question about implementation of setup to device tree is not in line with register's values, please create a new thread for it.

Regards,

Bulat

Re: CLKOUT0 configuration

GaryLiu — Wed, 26 Jan 2022 08:47:39 GMT

Dear Bulat,

Thanks for your reply!

PUE and PUS bits are not needed in your case, keep these as '0'.

<- So we don't have to set those two bit for setting the pin PF_03(83 SIUL2 0) as CLKOUT0 though we don't have a pull high resistor on this pin?

Question about implementation of setup to device tree is not in line with register's values, please create a new thread for it.

<- Do you mean I have to create a new thread on the same path :Home->Product Forums->S32G?

Or I should create it to the software Forums? But I am not sure which path matching this questions in software Forums.

thanks,

BR,

Gary

Re: CLKOUT0 configuration

Bulat — Thu, 27 Jan 2022 06:22:04 GMT

CLKOUT0 is an output pin and it does not need pull-ups. Pull-up/down can be important for input pins to prevent floating if no external source drives the pin.

Yes, you need to use 'Product Forums->S32G' path.

Regards,

Bulat

Re: CLKOUT0 configuration

GaryLiu — Thu, 27 Jan 2022 08:41:15 GMT

Dear Bulat,

OK! Thanks for your kindly reply.

thanks,

BR,

Gary