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    <title>S32GのトピックRe: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
    <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1707410#M4506</link>
    <description>&lt;P&gt;Hi Mr Daniel,&lt;/P&gt;&lt;P&gt;I use S32G-VNP-RDB2 eval board which has S32G274A chip and MX25UW51245G External Nor Flash.&lt;BR /&gt;I also use Mcal_S32x , SW32G_RTD_4.4_3.0.2_HF01 library. In this MCAL, I use FLS, FEE libraries " Fls_TS_T40D11M30I2R0 and Fee_TS_T40D11M30I2R0".&lt;BR /&gt;I use S32DS 3.5 IDE version.&lt;/P&gt;&lt;P&gt;When the platform is set to boot from RCON, I&lt;BR /&gt;I implement UART module for debugging to see which init phase goes timeout and then I found the call stack like :&lt;BR /&gt;Fls_Init()-&amp;gt; Fls_IPW_Init() -&amp;gt; Fls_IPW_InitMemories() -&amp;gt; Qspi_Ip_Init&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_3-1692347944179.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237041i93CB26BDB78DA35B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_3-1692347944179.png" alt="ShadowShooTR_3-1692347944179.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In the Qspi_Ip_InitProtection function,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_4-1692348021424.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237042i07B607A6D7C12C51/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_4-1692348021424.png" alt="ShadowShooTR_4-1692348021424.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;this status is returned as timeout "&lt;SPAN&gt;STATUS_QSPI_IP_TIMEOUT"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;--&amp;gt; Before the proceeding get and set protection phase on flash , it ensures that the previous command is completed.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Previous command is came from Qspi_Ip_InitDevice function.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_5-1692348219360.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237043iA95EFEFEB9D07BF1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_5-1692348219360.png" alt="ShadowShooTR_5-1692348219360.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I mean before the&amp;nbsp;Qspi_Ip_InitProtection function, Qspi_Ip_ControllerInit function is called. There are lots of QSPI operation handled in this function. After that Qspı_Ip_InitProtection function is called and in this function it&amp;nbsp;&lt;SPAN&gt;waits until the previous command is completed. But it is not. It goes timeout.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I run the platform on SRAM, it is initialized properly. However when I try to run on FLASH, it is not.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please help me ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205137"&gt;@Daniel-Aguirre&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 18 Aug 2023 08:47:37 GMT</pubDate>
    <dc:creator>ShadowShooTR</dc:creator>
    <dc:date>2023-08-18T08:47:37Z</dc:date>
    <item>
      <title>After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1701944#M4405</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;When I run on the SRAM, I can use the QSPI NOR Flash for calibration data write/read operation.&lt;/P&gt;&lt;P&gt;However when I flash the code and setting up the BMODE1 is 1 and BMODE2 is 0 which is boot from external memory using RCON configuration, It boots up properly but once calling a QSPI read function it goes timeout and crashes.&amp;nbsp;&lt;/P&gt;&lt;P&gt;What are the possible solutions?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 12:43:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1701944#M4405</guid>
      <dc:creator>ShadowShooTR</dc:creator>
      <dc:date>2023-08-09T12:43:03Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1702181#M4412</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Could you please provide the following information?&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Are you using an NXP platform? If so, which one?&lt;/LI&gt;
&lt;LI&gt;Which RTD version are you using?&lt;/LI&gt;
&lt;LI&gt;Which IDE version are you using?&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;Also, how are you verifying that the QSPI goes timeout when your platform is set to boot from RCON?&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 17:56:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1702181#M4412</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-08-09T17:56:15Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1707410#M4506</link>
      <description>&lt;P&gt;Hi Mr Daniel,&lt;/P&gt;&lt;P&gt;I use S32G-VNP-RDB2 eval board which has S32G274A chip and MX25UW51245G External Nor Flash.&lt;BR /&gt;I also use Mcal_S32x , SW32G_RTD_4.4_3.0.2_HF01 library. In this MCAL, I use FLS, FEE libraries " Fls_TS_T40D11M30I2R0 and Fee_TS_T40D11M30I2R0".&lt;BR /&gt;I use S32DS 3.5 IDE version.&lt;/P&gt;&lt;P&gt;When the platform is set to boot from RCON, I&lt;BR /&gt;I implement UART module for debugging to see which init phase goes timeout and then I found the call stack like :&lt;BR /&gt;Fls_Init()-&amp;gt; Fls_IPW_Init() -&amp;gt; Fls_IPW_InitMemories() -&amp;gt; Qspi_Ip_Init&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_3-1692347944179.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237041i93CB26BDB78DA35B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_3-1692347944179.png" alt="ShadowShooTR_3-1692347944179.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In the Qspi_Ip_InitProtection function,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_4-1692348021424.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237042i07B607A6D7C12C51/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_4-1692348021424.png" alt="ShadowShooTR_4-1692348021424.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;this status is returned as timeout "&lt;SPAN&gt;STATUS_QSPI_IP_TIMEOUT"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;--&amp;gt; Before the proceeding get and set protection phase on flash , it ensures that the previous command is completed.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Previous command is came from Qspi_Ip_InitDevice function.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ShadowShooTR_5-1692348219360.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237043iA95EFEFEB9D07BF1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ShadowShooTR_5-1692348219360.png" alt="ShadowShooTR_5-1692348219360.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I mean before the&amp;nbsp;Qspi_Ip_InitProtection function, Qspi_Ip_ControllerInit function is called. There are lots of QSPI operation handled in this function. After that Qspı_Ip_InitProtection function is called and in this function it&amp;nbsp;&lt;SPAN&gt;waits until the previous command is completed. But it is not. It goes timeout.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I run the platform on SRAM, it is initialized properly. However when I try to run on FLASH, it is not.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please help me ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205137"&gt;@Daniel-Aguirre&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 18 Aug 2023 08:47:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1707410#M4506</guid>
      <dc:creator>ShadowShooTR</dc:creator>
      <dc:date>2023-08-18T08:47:37Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1708537#M4514</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;We may have missed if you said it or not, but have you used any of the available examples?&lt;/P&gt;
&lt;P&gt;We are using the "Qspi_Ip_Example_S32G274A_M7" example which provides the following result (under SRAM):&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1692644655625.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237295iAD0CC11AD687DC13/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1692644655625.png" alt="DanielAguirre_0-1692644655625.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;It writes 128 bytes to the address 4096 decimal (0x1000) under the NOR Flash. We modified the example prior to flashing it to the S32G2-RDB2 platform, where the first value to be written is 2 instead of 0, then continue counting up (in other words, all values will have an offset of 2 decimal). Once we flash the example with this modification (using an IVT) we see the following outcome:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_1-1692644782285.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237296i992FAAE9BA2F80DD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_1-1692644782285.png" alt="DanielAguirre_1-1692644782285.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Which we correctly see the offset we provided to the example.&lt;/P&gt;
&lt;P&gt;As a note, we obtain the Flash dump from S32 Flash Tool, we set the following range:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_2-1692644904070.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237297iA82A0EEC0AB2FAA3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_2-1692644904070.png" alt="DanielAguirre_2-1692644904070.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;That is why the first address is 0x0 under our images.&lt;/P&gt;
&lt;P&gt;In summary, we are not seeing the behavior you are seeing. As said in the beginning, are you using a provided example?&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Mon, 21 Aug 2023 19:12:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1708537#M4514</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-08-21T19:12:13Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1709986#M4541</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your generosity in sharing such valuable insights and information.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Yes I used&amp;nbsp;Qspi_Ip_Example_S32G274A_M7.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;An update !&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I noticed that, when I produce the blob image from binary, I select&amp;nbsp;&amp;nbsp;S32G274_QuadSPI_133MHz_SDR_configuration.&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="a.PNG" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237684i47B2A7702B79C94F/image-size/large?v=v2&amp;amp;px=999" role="button" title="a.PNG" alt="a.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And once I flash the board, this problem occurs.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;However when I select&amp;nbsp;S32G274_QuadSPI_133MHz_DDR_configuration, the initialization phase is passed properly. Now I'm testing and trying to understand why.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Also the FLS configuration is the exactly the same as the example which you've mentioned&amp;nbsp;&lt;SPAN&gt;Qspi_Ip_Example_S32G274A_M7.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please help me to understand this ?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards, &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Halil&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205137"&gt;@Daniel-Aguirre&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Aug 2023 14:30:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1709986#M4541</guid>
      <dc:creator>ShadowShooTR</dc:creator>
      <dc:date>2023-08-23T14:30:08Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1710114#M4545</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Could be a problem of the address where code is writing to. We have tried to use the SDR QSPI configuration and see no problem but moved the JOB_ADDRESS to 0x250000:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1692822265262.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237707i6BE35EAC7FFF30F1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1692822265262.png" alt="DanielAguirre_0-1692822265262.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Since this address is not occupied by our application, it is not being erased, for which we need to erase this sector manually prior to executing the code.&lt;/P&gt;
&lt;P&gt;Also, we modified the linker file as follows, for us to not use QSPI configuration to confirm the functionality without reconfiguration under the BootROM stage:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_1-1692822331169.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/237708i84667E2F490D1B93/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_1-1692822331169.png" alt="DanielAguirre_1-1692822331169.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;This same linker is used once we add the SDR configuration, we don't see any difference.&lt;/P&gt;
&lt;P&gt;As for the configuration, should be, since we understand both provide the same functionality. Seems to us that the write address has changed, so it should be take into account.&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Aug 2023 20:31:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1710114#M4545</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-08-23T20:31:21Z</dc:date>
    </item>
    <item>
      <title>Re: After QSPI boot from External Flash, QSPI not used for write/read operation while runtime</title>
      <link>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1774445#M5545</link>
      <description>&lt;P&gt;Hello Daniel,&lt;BR /&gt;I couldn't chance to write to you. My project was changed so I jumped into different problems, I apologize for that.&lt;BR /&gt;&lt;BR /&gt;Code address and calibration address were separate in the project (linker). When I want to write or erase the calibration value, I don't erase code address area. I have checked it.&lt;BR /&gt;&lt;BR /&gt;For this solution: "When I use SDR configuration, it didn't work. However, DDR configuration works properly. "&lt;BR /&gt;-&amp;gt; FLS initialization phase, I have used command messages for initializing the ex-flash. And this is arranged for DDR configuration.&lt;BR /&gt;I don't remember whether I have checked the example code's linker section or not, when I find opportunity to check, I will go back and try this example code as you said.&lt;BR /&gt;&lt;BR /&gt;Thank you so much for your interest and help.&lt;BR /&gt;Best Regards,&lt;BR /&gt;Halil&lt;/P&gt;</description>
      <pubDate>Thu, 14 Dec 2023 06:23:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/After-QSPI-boot-from-External-Flash-QSPI-not-used-for-write-read/m-p/1774445#M5545</guid>
      <dc:creator>ShadowShooTR</dc:creator>
      <dc:date>2023-12-14T06:23:43Z</dc:date>
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