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    <title>topic Re: S32G PC12 pin output level problem in S32G</title>
    <link>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1693323#M4227</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;We do apologize, we are not understanding the overall issue you are seeing. Can you help summarizing what is the issue you are seeing?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;i.e. in the following sentence:&lt;/P&gt;
&lt;P&gt;"&lt;SPAN class=""&gt;There is no operation for PC_12/LLCE_CAN0_TX except initialization.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;In addition, this pin configuration is the input, the software can not modify the output level.&lt;/SPAN&gt;"&lt;/P&gt;
&lt;P&gt;You are talking about a TX pin, which is an output (as seen on the image below), but you are referring to it as input, which we are confused by the statement. Again, we do apologize.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1690400006228.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/233767i330B56AF340A50F9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1690400006228.png" alt="DanielAguirre_0-1690400006228.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;DanielAguirre_0-1690400006228.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Also, are you using any NXP platform/board? Are you using any LLCE example? In which LLCE version are you seeing this behavior?&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
    <pubDate>Wed, 26 Jul 2023 19:33:49 GMT</pubDate>
    <dc:creator>Daniel-Aguirre</dc:creator>
    <dc:date>2023-07-26T19:33:49Z</dc:date>
    <item>
      <title>S32G PC12 pin output level problem</title>
      <link>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1692944#M4217</link>
      <description>&lt;P&gt;Dear，&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Product platform: S32G274, NON-AUTOSAR based development of the program has been tested on the same board is no problem.&lt;/SPAN&gt;&lt;SPAN class=""&gt; I used 3.0.2 RTD before, but now I use 4.0.1 RTD based on AUTOSAR. Because this problem occurred after 100ms of power-on, while LLCE initialization took place after 200ms, I think it has nothing to do with LLCE. It may be caused by port, which uses MCAL.&lt;/SPAN&gt;&lt;SPAN class=""&gt; So it shouldn't have anything to do with AUTOSAR. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;I suspect that the Port driver mistakenly operated the level in the CANTX pin during initialization. I measured the TX pin of CAN: &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;PC_12/LLCE_CAN0_TX Pin:&lt;/SPAN&gt;&lt;SPAN class=""&gt; As shown in the following figure, the green pin is PC_12/LLCE_CAN0_TX. When powered on for about 120ms, it should be during Port initialization. PC12 is pulled down for 110ms and then pulled up.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;No pull-down resistors are added to the hardware, which is a directly connected can transceiver.&amp;nbsp;See Attachment 1 for the hardware schematic diagram.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;There is no operation for PC_12/LLCE_CAN0_TX except initialization.&lt;/SPAN&gt;&lt;SPAN class=""&gt; In addition, this pin configuration is the input, the software can not modify the output level. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;In addition, we have done comparative tests, and PC_12 is configured as ordinary input IO, there is no problem. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;So I suspect there is a drop down inside the S32G or some other internal chip logic or Port module internal logic. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;The following is the comparison test done. In the two tests, only the mode configuration of PC_12 pin is different, and other codes and hardware environments are identical.&lt;/SPAN&gt;&lt;SPAN class=""&gt; The software also blocks the initialization of LLCECAN, FLEXCAN, and all code.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;PC_12 is configured as the LLCE_CAN0_TX power-on waveform, as shown in Figure 2 &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;PC_12 is configured as a common IO power-on waveform, as shown in Figure 3&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Thank You!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Best Regards!&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 26 Jul 2023 09:39:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1692944#M4217</guid>
      <dc:creator>jack_huang1</dc:creator>
      <dc:date>2023-07-26T09:39:41Z</dc:date>
    </item>
    <item>
      <title>Re: S32G PC12 pin output level problem</title>
      <link>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1693323#M4227</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;We do apologize, we are not understanding the overall issue you are seeing. Can you help summarizing what is the issue you are seeing?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;i.e. in the following sentence:&lt;/P&gt;
&lt;P&gt;"&lt;SPAN class=""&gt;There is no operation for PC_12/LLCE_CAN0_TX except initialization.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;In addition, this pin configuration is the input, the software can not modify the output level.&lt;/SPAN&gt;"&lt;/P&gt;
&lt;P&gt;You are talking about a TX pin, which is an output (as seen on the image below), but you are referring to it as input, which we are confused by the statement. Again, we do apologize.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1690400006228.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/233767i330B56AF340A50F9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1690400006228.png" alt="DanielAguirre_0-1690400006228.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;DanielAguirre_0-1690400006228.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Also, are you using any NXP platform/board? Are you using any LLCE example? In which LLCE version are you seeing this behavior?&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Wed, 26 Jul 2023 19:33:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1693323#M4227</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-07-26T19:33:49Z</dc:date>
    </item>
    <item>
      <title>Re: S32G PC12 pin output level problem</title>
      <link>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1693875#M4231</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Dear&amp;nbsp;&amp;nbsp;Daniel-Aguirre： &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; When the PC12 pin is set to LLCE_CAN0_TX, the output of the pin is low, resulting in a Busoff problem. Configure the pin in IO mode and the output level is high. And compared with PJ_01 pin, after the pin is configured as LLCE_CAN1_TX, the output waveform is high and CAN communication is normal. Now we need to confirm what might cause the output of the pin to be pulled down after the pin of PC12 is configured as LLCE_CAN0_TX. &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; At present, I have done the test of progress 1, which is as follows: &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Mask all tasks, only initialize, and postpone the Port_Init() to call after 1 second, use the oscilloscope to catch the waveform, you can confirm that PC_12/LLCE_CAN0_TX is pulled down after calling Port_Init(), and there is no other operation on the software. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Port_Init() is called after 1 second, PC_12/LLCE_CAN0_TX wave line, as shown in Figure 1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Port_Init() is called after 1 second, PJ_01/LLCE_CAN1_TX waveform, as shown in Figure&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;2. &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; See Attachment 3 for the configuration files and generated code for Port.&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Thank You！ &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Best Regards！&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Jul 2023 06:55:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1693875#M4231</guid>
      <dc:creator>jack_huang1</dc:creator>
      <dc:date>2023-07-27T06:55:55Z</dc:date>
    </item>
    <item>
      <title>Re: S32G PC12 pin output level problem</title>
      <link>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1694480#M4240</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Thanks for your feedback.&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Are you using any NXP platform/board? Are you using any LLCE example? In which LLCE version are you seeing this behavior?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;We don't seem to obtain this behavior from our side under the provided LLCE examples.&lt;/P&gt;
&lt;P&gt;Regarding the Port configuration, there is a "PortPin Level Value" option, you should be able to set the initial value of the pin, which value are you defining?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1690495953764.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/233991iE554498C44C21B9F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1690495953764.png" alt="DanielAguirre_0-1690495953764.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;DanielAguirre_0-1690495953764.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If you would like for us to review any configuration, help us opening a ticket under the NXP online services, since it is not common for us to provide reviews under the community, we do apologize.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please, let us know.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Jul 2023 22:14:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G-PC12-pin-output-level-problem/m-p/1694480#M4240</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-07-27T22:14:58Z</dc:date>
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