topic Re: Initialization SRAM in S32G in S32G

Initialization SRAM in S32G

Forest_Hoang — Tue, 22 Jun 2021 08:18:17 GMT

Could you show me how to determine start address PRAMIAS[IAS] and end address PRAMIAE[IAE] when initial SRAM in S32G

I don't get 2 examples in S32G_RM document

local_bus_addr[31:0] = bus_addr - base_addr
mem_addr[16:0] = local_bus_addr[31:0] > 3

local_bus_addr[31:0] = bus_addr - base_addr
mem_addr[16:0] = local_bus_addr[31:0] > 4

when we use shift 3 or 4?

Thanks!

Re: Initialization SRAM in S32G

bpe — Fri, 25 Jun 2021 08:39:27 GMT

Initialization examples in S32GRM, Chapter 35 are generic and given to aid in
understanding the memory controller organization principle rather than a specific
implementation. None of these examples is directly applicable to S32G2.

On S32G2, Standby RAM is 32-bit wide plus 7 bits ECC, thus address offsets as
visible to the local processor should be shifted right two bits to produce the
proper value for PRAMIAS[IAS] and PRAMIAE[IAE]

Hope this Helps,
Platon

Re: Initialization SRAM in S32G

Forest_Hoang — Tue, 29 Jun 2021 10:09:57 GMT

As Document, SRAM range from 0x3400_0000 to 0x347F_FFFF, If I want to configure the memory region from 0x3420_0000 to 0x342F_FFFF, what is the value I can fill in PRAMIAS[IAS] and PRAMIAE[IAE]? Because If shift right 2 bit, the length of PRAMIAS[IAS] and PRAMIAE[IAE] is not enough to fill.

Thanks!