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    <title>topic Re: Unable to get BMU2 pool memory in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1617396#M2504</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Harish&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Hope you are doing fine&lt;/P&gt;
&lt;P&gt;Tell me, which documents you are referring. Tell the name and version of manual you are reading.&lt;/P&gt;
&lt;P&gt;Thanks&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
    <pubDate>Fri, 17 Mar 2023 07:19:48 GMT</pubDate>
    <dc:creator>nxf92355</dc:creator>
    <dc:date>2023-03-17T07:19:48Z</dc:date>
    <item>
      <title>Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1602981#M2275</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to bring up a RDB2 with QNX OS 7.1 and PFE&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;using&lt;/P&gt;&lt;P&gt;as_add_containing(0x80000000, 0x80000000 + 0x004000000 - 1, AS_ATTR_RAM, "pfe_ddr", "ram");&lt;/P&gt;&lt;P&gt;setenv boot_qnx "sja probe 1:0;pfeng enable; s32ccgmac disable; s32ccgmac enable; mmc dev 0;fatload mmc 0:1 0x8107FFC0 fsl-s32g274a-rdb2.dtb;fatload mmc 0:1 0x8007ffc0 ifs-s32g-rdb.ui;bootm 0x8007ffc0 - 0x8107FFC0"&lt;BR /&gt;&lt;BR /&gt;while loading PFE : io-pkt-v6-hc -p tcpip stacksize=16384,stackguard -d /proc/boot/devnp-pfe-2.so pfe0_mac=000a0b0c0d66,pfe1_mac=001a1b1c1d66,pfe2_mac=002a2b2c2d66,pfe1_link=1000-1-3,pfe2_link=100-1-3,pfe0_link=1000-1-3,class_fw=/proc/boot/s32g_pfe_class.fw&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;i am facing this issue :&lt;/P&gt;&lt;P&gt;Starting Networking driver (/dev/socket) for RDB2...&lt;BR /&gt;INF[src/pfe_drv.c:1298]: --- STANDARD driver @ 6 (SC)&lt;BR /&gt;INF[src/pfe_drv.c:1305]: --- Safe IRQ enabled. No InterrupAttach() or InterruptA ttach_r() allowed.&lt;BR /&gt;INF[src/pfe_fw.c:83]: 165716 bytes read&lt;BR /&gt;INF[src/pfe_fw.c:89]: Loaded firmware file: /proc/boot/s32g_pfe_class.fw&lt;BR /&gt;INF[src/pfe_drv.c:1409]: Setting pfe0/EMAC0 MII mode to SGMII.&lt;BR /&gt;INF[src/pfe_drv.c:1409]: Setting pfe1/EMAC1 MII mode to SGMII.&lt;BR /&gt;INF[src/pfe_drv.c:1409]: Setting pfe2/EMAC2 MII mode to SGMII.&lt;BR /&gt;INF[src/pfe_drv.c:1416]: Issuing PFE peripheral reset...INF[src/pfe_drv.c:1417]: PFE reset OK.&lt;BR /&gt;INF[hw/s32g/pfe_platform_master.c:3055]: PFE CBUS p0x46000000 mapped @ v0x18b0ed 6000&lt;BR /&gt;INF[src/pfe_hw_feature.c:86]: Silicon S32G2&lt;BR /&gt;INF[hw/s32g/pfe_platform_master.c:1596]: BMU1 buffer base: p0xc0000000&lt;BR /&gt;ERR[src/oal_mm_qnx.c:288]: Could not open pfe_ddr: 2&lt;BR /&gt;ERR[hw/s32g/pfe_platform_master.c:1623]: Unable to get BMU2 pool memory&lt;BR /&gt;ERR[src/pfe_drv.c:1456]: Unable to initialize the platform&lt;BR /&gt;INF[src/pfe_drv.c:1630]: PFE entry failed, PFE driver terminated&lt;BR /&gt;if_up: retries exhausted&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 21 Feb 2023 14:23:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1602981#M2275</guid>
      <dc:creator>Harish_Adhikam</dc:creator>
      <dc:date>2023-02-21T14:23:25Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1609118#M2381</link>
      <description>&lt;P&gt;Hi Harish&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope you are doing well. this case assigned and we will update&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards ,&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
      <pubDate>Fri, 03 Mar 2023 09:49:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1609118#M2381</guid>
      <dc:creator>nxf92355</dc:creator>
      <dc:date>2023-03-03T09:49:45Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1617396#M2504</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Harish&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Hope you are doing fine&lt;/P&gt;
&lt;P&gt;Tell me, which documents you are referring. Tell the name and version of manual you are reading.&lt;/P&gt;
&lt;P&gt;Thanks&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
      <pubDate>Fri, 17 Mar 2023 07:19:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1617396#M2504</guid>
      <dc:creator>nxf92355</dc:creator>
      <dc:date>2023-03-17T07:19:48Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619827#M2575</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Harish&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;is The issue solved ? or Please update the asked information.&lt;/P&gt;
&lt;P&gt;Thanks ,&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
      <pubDate>Wed, 22 Mar 2023 13:07:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619827#M2575</guid>
      <dc:creator>nxf92355</dc:creator>
      <dc:date>2023-03-22T13:07:15Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619930#M2578</link>
      <description>&lt;P&gt;•Build and Generation of devnp-pfe-2.so is done as per user manual&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp; (PFE_S32G_A53_QNX_IntegrationManual.pdf) Chapter 2.7&lt;/P&gt;&lt;P&gt;•PFE Version : 1.4&lt;/P&gt;&lt;P&gt;•devnp-pfe-2.so :&amp;nbsp; (PFE-DRV_S32G_A53_QNX_1.4.0_CD1) able to build with QNX SDP 710&amp;nbsp;&lt;/P&gt;&lt;P&gt;•s32g_pfe_class.fw : PFE-FW_S32G_1.4.0&lt;/P&gt;&lt;P&gt;&amp;nbsp; # cat /dev/pfe_class&lt;/P&gt;&lt;P&gt;&amp;nbsp; FIRMWARE VERSION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1.4.0 (api:92367c0e25f21f49217a9b08168ad2c8)&lt;/P&gt;</description>
      <pubDate>Wed, 22 Mar 2023 15:03:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619930#M2578</guid>
      <dc:creator>Harish_Adhikam</dc:creator>
      <dc:date>2023-03-22T15:03:19Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get BMU2 pool memory</title>
      <link>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619934#M2579</link>
      <description>&lt;P&gt;•Build and Generation of devnp-pfe-2.so is done as per user manual&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp; (PFE_S32G_A53_QNX_IntegrationManual.pdf) Chapter 2.7&lt;/P&gt;&lt;P&gt;•PFE Version : 1.4&lt;/P&gt;&lt;P&gt;•devnp-pfe-2.so :&amp;nbsp; (PFE-DRV_S32G_A53_QNX_1.4.0_CD1) able to build with QNX SDP 710&amp;nbsp;&lt;/P&gt;&lt;P&gt;•s32g_pfe_class.fw : PFE-FW_S32G_1.4.0&lt;/P&gt;&lt;P&gt;&amp;nbsp; # cat /dev/pfe_class&lt;/P&gt;&lt;P&gt;&amp;nbsp; FIRMWARE VERSION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1.4.0 (api:92367c0e25f21f49217a9b08168ad2c8)&lt;/P&gt;</description>
      <pubDate>Wed, 22 Mar 2023 15:06:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Unable-to-get-BMU2-pool-memory/m-p/1619934#M2579</guid>
      <dc:creator>Harish_Adhikam</dc:creator>
      <dc:date>2023-03-22T15:06:00Z</dc:date>
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