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    <title>S32GのトピックRe: multicore boot problem</title>
    <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1616611#M2487</link>
    <description>&lt;P&gt;thank you, but I still have question about Q3:Each core app will be configured with a Reset handler address by EB Tresos, M7_0 core search the key word Reset_Handler in the map file to get the value of `Reset handler address`, M7_1 core search the key word intc_vector in the map file to get the value of `Reset handler address`, M7_2 core search the key word intc_vector in the map file to get the value of `Reset handler address`. I don't know why the keywords of the three core searches are different.&lt;BR /&gt;&lt;BR /&gt;And I have a new question Q4:How to solve the resource conflict between M7 core and A53 core?Do you have any documents about this?&lt;/P&gt;</description>
    <pubDate>Thu, 16 Mar 2023 09:26:47 GMT</pubDate>
    <dc:creator>shanlan123</dc:creator>
    <dc:date>2023-03-16T09:26:47Z</dc:date>
    <item>
      <title>multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1614887#M2458</link>
      <description>&lt;P&gt;我在学习文档《AN13750-EnablingMulticoreApplicationOnS32G2UsingS32G2PlatformSoftwareIntegrantion》，有如下问题：&lt;/P&gt;&lt;P&gt;1 这个文档里面说IPCF组件里面有3个例子（M7_0、M7_1、M7_2各一个），但是我下载的IPCF组件里面只有2个例子（M7_0和M7_1的）。（IPCF组件版本号与文档里一致）&lt;BR /&gt;2 我发现M7_0和M7_1编译完后，内存加载地址、程序入口地址与文档上的不一样，并且M7_0的地址与fip.bin的地址有重叠。请问这个问题应该怎么处理呢？&lt;/P&gt;&lt;P&gt;3&amp;nbsp;每个核的app都会配置一个程序入口地址，M7_0核是在map文件里搜索Reset_Handler来找入口地址，M7_1核是在map文件里搜索intc_vector来找入口地址，我不清楚为什么2个核搜索的关键字不一样&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2023 11:27:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1614887#M2458</guid>
      <dc:creator>shanlan123</dc:creator>
      <dc:date>2023-03-14T11:27:07Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1615107#M2462</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Could you help us putting this inquiry in english? At this moment, the main support for S32G family is being done in english.&lt;/P&gt;
&lt;P&gt;We do apologize for the inconvenience.&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2023 15:24:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1615107#M2462</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-03-14T15:24:04Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1615303#M2467</link>
      <description>I am studying the document &amp;lt;AN13750-EnablingMulticoreApplicationOnS32G2UsingS32G2PlatformSoftwareIntegration&amp;gt;, and have the following questions:&lt;BR /&gt;&lt;BR /&gt;1 This document says that there are three examples in the IPCF package (M7_0, M7_1 and M7_2 each), but there are only two examples in the IPCF package I downloaded (M7_0 and M7_1). (IPCF package version number is consistent with that in the document)&lt;BR /&gt;&lt;BR /&gt;2 I found M7_ 0 and M7_ 1 After compilation, the Load image address and Reset handler address are different from those in the document, and The address of M7_0 overlaps with that of fip.bin. How should I deal with this problem?&lt;BR /&gt;&lt;BR /&gt;3. Each core app will be configured with a Reset handler address by EB Tresos, M7_ 0 core search the key word Reset_Handler in the map file to get the value of `Reset handler address`, M7_ 1 core search the key word intc_vector in the map file to get the value of `Reset handler address`. I don't know why the keywords of the two core searches are different</description>
      <pubDate>Wed, 15 Mar 2023 01:52:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1615303#M2467</guid>
      <dc:creator>shanlan123</dc:creator>
      <dc:date>2023-03-15T01:52:58Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1616005#M2477</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Below will be some comments for your questions:&lt;/P&gt;
&lt;P&gt;Q1 &amp;gt;&amp;gt;&amp;nbsp;&lt;SPAN&gt;This document says that there are three examples in the IPCF package (M7_0, M7_1 and M7_2 each), but there are only two examples in the IPCF package I downloaded (M7_0 and M7_1). (IPCF package version number is consistent with that in the document)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;A1 &amp;gt;&amp;gt; That is because the examples that the AN13750 is referring to are the ones provided on the AN13750SW. This is available under the S32G2 product page (link:&amp;nbsp;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32g-vehicle-network-processors/s32g2-processors-for-vehicle-networking:S32G2" target="_blank"&gt;S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors&lt;/A&gt;). Below will be a picture of this:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1678901801312.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214775iCDEFE896A4C92E6D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DanielAguirre_0-1678901801312.png" alt="DanielAguirre_0-1678901801312.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;DanielAguirre_0-1678901801312.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Q2 &amp;amp; Q3 &amp;gt;&amp;gt;&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;I found M7_ 0 and M7_ 1 After compilation, the Load image address and Reset handler address are different from those in the document, and The address of M7_0 overlaps with that of fip.bin. How should I deal with this problem?&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;Each core app will be configured with a Reset handler address by EB Tresos, M7_ 0 core search the key word Reset_Handler in the map file to get the value of `Reset handler address`, M7_ 1 core search the key word intc_vector in the map file to get the value of `Reset handler address`. I don't know why the keywords of the two core searches are different&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;A2 &amp;amp; A3 &amp;gt;&amp;gt; Given the projects are different from the ones you are using, could be that these 2 questions are answered by using the provided examples.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please, let us know.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 17:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1616005#M2477</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-03-15T17:38:30Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1616611#M2487</link>
      <description>&lt;P&gt;thank you, but I still have question about Q3:Each core app will be configured with a Reset handler address by EB Tresos, M7_0 core search the key word Reset_Handler in the map file to get the value of `Reset handler address`, M7_1 core search the key word intc_vector in the map file to get the value of `Reset handler address`, M7_2 core search the key word intc_vector in the map file to get the value of `Reset handler address`. I don't know why the keywords of the three core searches are different.&lt;BR /&gt;&lt;BR /&gt;And I have a new question Q4:How to solve the resource conflict between M7 core and A53 core?Do you have any documents about this?&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 09:26:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1616611#M2487</guid>
      <dc:creator>shanlan123</dc:creator>
      <dc:date>2023-03-16T09:26:47Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617049#M2493</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;The difference should be related to the M7_0 core being previously initialized by the BootROM to generate the initial configuration. This is, M7_0 is already initialized prior to the other M7_1 and M7_2, hence there is no need of set the entry pointer to the interrupt vector.&lt;/P&gt;
&lt;P&gt;As for the additional question, can you elaborate more on the "&lt;SPAN&gt;solve the resource conflict between M7 core and A53 core&lt;/SPAN&gt;"? The resource management between the M7 cores and the A53 clusters should be defined prior to the start of the application itself, to prevent undefined behavior:&lt;/P&gt;
&lt;P&gt;"&lt;SPAN&gt;Assuming that there is a multi-core application for M7_0 and A53 clusters, customer should well plan what modules are controlled by M7_0, what modules are controlled by A53 etc. For the modules used by both M7_0 and A53 clusters, such as clock-related modules (FXOSC, PLL etc.), should avoid these modules being configured from both sides. Otherwise, the system will become unstable, or even resets due to improper configuration operations.&lt;/SPAN&gt;"&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 18:21:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617049#M2493</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-03-16T18:21:34Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617226#M2496</link>
      <description>Thank you. You have solved my problem.&lt;BR /&gt;If you could provide me with relevant documents for Q4, I would appreciate it very much.</description>
      <pubDate>Fri, 17 Mar 2023 01:54:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617226#M2496</guid>
      <dc:creator>shanlan123</dc:creator>
      <dc:date>2023-03-17T01:54:24Z</dc:date>
    </item>
    <item>
      <title>Re: multicore boot problem</title>
      <link>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617756#M2508</link>
      <description>&lt;P&gt;Thanks for your feedback.&lt;/P&gt;
&lt;P&gt;The quoted comment was not inside a document, was a comment from one of our internal team members. We do apologize for it.&lt;/P&gt;
&lt;P&gt;Please, let us know.&lt;/P&gt;</description>
      <pubDate>Fri, 17 Mar 2023 15:32:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/multicore-boot-problem/m-p/1617756#M2508</guid>
      <dc:creator>Daniel-Aguirre</dc:creator>
      <dc:date>2023-03-17T15:32:31Z</dc:date>
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