<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32GのトピックExternal Data Abort when calling Clock_Ip_Init()</title>
    <link>https://community.nxp.com/t5/S32G/External-Data-Abort-when-calling-Clock-Ip-Init/m-p/2402854#M16724</link>
    <description>&lt;P&gt;Hi there,&lt;/P&gt;&lt;P&gt;I'm attempting to initialise some peripheral clocks using the RTD and S32 DS mex tool.&amp;nbsp;(Note im generating the code in a M7 project, but actually building and running for a A53 project)&lt;/P&gt;&lt;P&gt;However, an &lt;STRONG&gt;external data abort&lt;/STRONG&gt; occurs inside&amp;nbsp;&lt;SPAN&gt;Clock_Ip_Init(). Specifically, the call stack looks like this:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Clock_Ip_Init -&amp;gt;&amp;nbsp;Clock_Ip_InitClock() -&amp;gt; Clock_Ip_DisableCmuFcFceRefCntLfrefHfref().&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;This appears to be the first attempt to actually write to the CMU peripheral memory. The fault occurs on a &lt;STRONG&gt;LDR&lt;/STRONG&gt; instruction on memory &lt;STRONG&gt;0x4005'C028&lt;/STRONG&gt; which according the S32G3 memory map correctly resides within the CMU memory area.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;At this stage, the MMU is not enabled, but my understanding is an external data abort occurs outside the CPU/MMU and is probably linked to &lt;STRONG&gt;secure access&lt;/STRONG&gt; or a &lt;STRONG&gt;"locked"&lt;/STRONG&gt; peripheral.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Am i right in saying the CMU needs to be made "accessible" from the A53 core in some manner prior calling&amp;nbsp;Clock_Ip_Init()? If so, could you advise on the steps to do so?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Jonny&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Device = S32G399A&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Compiler = S32DS_GCC _11_4&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Core = Cortex A53&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 07 Aug 2026 09:37:39 GMT</pubDate>
    <dc:creator>jonnyWHIS</dc:creator>
    <dc:date>2026-08-07T09:37:39Z</dc:date>
    <item>
      <title>External Data Abort when calling Clock_Ip_Init()</title>
      <link>https://community.nxp.com/t5/S32G/External-Data-Abort-when-calling-Clock-Ip-Init/m-p/2402854#M16724</link>
      <description>&lt;P&gt;Hi there,&lt;/P&gt;&lt;P&gt;I'm attempting to initialise some peripheral clocks using the RTD and S32 DS mex tool.&amp;nbsp;(Note im generating the code in a M7 project, but actually building and running for a A53 project)&lt;/P&gt;&lt;P&gt;However, an &lt;STRONG&gt;external data abort&lt;/STRONG&gt; occurs inside&amp;nbsp;&lt;SPAN&gt;Clock_Ip_Init(). Specifically, the call stack looks like this:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Clock_Ip_Init -&amp;gt;&amp;nbsp;Clock_Ip_InitClock() -&amp;gt; Clock_Ip_DisableCmuFcFceRefCntLfrefHfref().&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;This appears to be the first attempt to actually write to the CMU peripheral memory. The fault occurs on a &lt;STRONG&gt;LDR&lt;/STRONG&gt; instruction on memory &lt;STRONG&gt;0x4005'C028&lt;/STRONG&gt; which according the S32G3 memory map correctly resides within the CMU memory area.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;At this stage, the MMU is not enabled, but my understanding is an external data abort occurs outside the CPU/MMU and is probably linked to &lt;STRONG&gt;secure access&lt;/STRONG&gt; or a &lt;STRONG&gt;"locked"&lt;/STRONG&gt; peripheral.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Am i right in saying the CMU needs to be made "accessible" from the A53 core in some manner prior calling&amp;nbsp;Clock_Ip_Init()? If so, could you advise on the steps to do so?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Jonny&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Device = S32G399A&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Compiler = S32DS_GCC _11_4&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Core = Cortex A53&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 07 Aug 2026 09:37:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/External-Data-Abort-when-calling-Clock-Ip-Init/m-p/2402854#M16724</guid>
      <dc:creator>jonnyWHIS</dc:creator>
      <dc:date>2026-08-07T09:37:39Z</dc:date>
    </item>
  </channel>
</rss>

