<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic S32G274 baremetal code in S32G</title>
    <link>https://community.nxp.com/t5/S32G/S32G274-baremetal-code/m-p/2390645#M16546</link>
    <description>&lt;P&gt;&lt;SPAN&gt;I want to use a bare-metal program on the S32G274 development board, including bare-metal drivers for modules such as powering up the A53 processor, LINFlexD serial port, and Ethernet. I would like it to run successfully right out of the box. The drivers generated by S32DS only include processor power-up functionality. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have attempted to implement the LINFlexD serial port myself (enabling pins, enabling clocks, initializing the serial interface), but I'm unclear about how to properly handle clock enablement. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I hope you can provide me with a ready-to-use bare-metal program that can be directly compiled in S32DS.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Sat, 04 Jul 2026 02:34:54 GMT</pubDate>
    <dc:creator>Tatu_dd</dc:creator>
    <dc:date>2026-07-04T02:34:54Z</dc:date>
    <item>
      <title>S32G274 baremetal code</title>
      <link>https://community.nxp.com/t5/S32G/S32G274-baremetal-code/m-p/2390645#M16546</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I want to use a bare-metal program on the S32G274 development board, including bare-metal drivers for modules such as powering up the A53 processor, LINFlexD serial port, and Ethernet. I would like it to run successfully right out of the box. The drivers generated by S32DS only include processor power-up functionality. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have attempted to implement the LINFlexD serial port myself (enabling pins, enabling clocks, initializing the serial interface), but I'm unclear about how to properly handle clock enablement. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I hope you can provide me with a ready-to-use bare-metal program that can be directly compiled in S32DS.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 04 Jul 2026 02:34:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G274-baremetal-code/m-p/2390645#M16546</guid>
      <dc:creator>Tatu_dd</dc:creator>
      <dc:date>2026-07-04T02:34:54Z</dc:date>
    </item>
    <item>
      <title>Re: S32G274 baremetal code</title>
      <link>https://community.nxp.com/t5/S32G/S32G274-baremetal-code/m-p/2390829#M16549</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/264387"&gt;@Tatu_dd&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for your post.&lt;BR /&gt;&lt;SPAN&gt;1. NXP's software enablement strategy for S32G274A positions the A53 cores primarily for Linux BSP operation rather than bare-metal development. The S32 Design Studio 3.6.8 examples for A53 cores are intentionally limited to boot/startup code, as the intended use case involves running a full Linux distribution on these cores.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chenyin_h_0-1783303897346.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/391266i800CEEE245292400/image-size/medium?v=v2&amp;amp;px=400" role="button" title="chenyin_h_0-1783303897346.png" alt="chenyin_h_0-1783303897346.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2. For bare-metal A53 development, there are not much reference code released, there is only a demo existed, but it is not pure bare metal code on A53, but a heterogenous implementation instead&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chenyin_h_1-1783304026380.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/391267i60B4330E33184206/image-size/medium?v=v2&amp;amp;px=400" role="button" title="chenyin_h_1-1783304026380.png" alt="chenyin_h_1-1783304026380.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;As a result, you may have to implement or port the existing Linux driver or RTD driver according to your requirement, sorry that there is no directly formal examples/software releases provisioned by NXP.&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Chenyin&lt;/P&gt;</description>
      <pubDate>Mon, 06 Jul 2026 02:16:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G274-baremetal-code/m-p/2390829#M16549</guid>
      <dc:creator>chenyin_h</dc:creator>
      <dc:date>2026-07-06T02:16:49Z</dc:date>
    </item>
  </channel>
</rss>

