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    <title>S32G中的主题 Re: Hi,</title>
    <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267969#M15729</link>
    <description>&lt;P&gt;hi,&lt;SPAN&gt;Kulkarni_v&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Ok, hope this can help you, you can contact me or create a new case if you still have question.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;</description>
    <pubDate>Tue, 23 Dec 2025 06:05:26 GMT</pubDate>
    <dc:creator>Joey_z</dc:creator>
    <dc:date>2025-12-23T06:05:26Z</dc:date>
    <item>
      <title>Hi,</title>
      <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267680#M15723</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working on the S32G VNP RDB3 board (S32G399A) using the Auto Linux BSP on the A-core and FreeRTOS on the M7 core.&lt;/P&gt;&lt;P&gt;My IPCF (Inter-Processor Communication Framework) setup between A-core and M-core is working correctly. Now, I want to run a custom M-core application alongside IPCF, and for debugging purposes I am trying to enable UART debug prints from the M7 core on UART1 (LINFlexD1).&lt;/P&gt;&lt;P&gt;What I have done so far&lt;BR /&gt;Configured LINFlexD1 (UART1) in S32 Design Studio&lt;/P&gt;&lt;P&gt;Enabled UART1 clock and pin mux&lt;/P&gt;&lt;P&gt;Generated LINFlexD UART MCAL configuration&lt;/P&gt;&lt;P&gt;Initialized UART1 in M7 application code&lt;/P&gt;&lt;P&gt;Added a simple UART transmit test (no loopback)&lt;/P&gt;&lt;P&gt;Added LED blinking for sanity check&lt;/P&gt;&lt;P&gt;IPCF continues to work correctly&lt;/P&gt;&lt;P&gt;Observed issues&lt;BR /&gt;No output on UART1 from the M7 core (terminal remains blank)&lt;/P&gt;&lt;P&gt;UART0 is intentionally not used by M-core since it is used by A-core boot logs&lt;/P&gt;&lt;P&gt;LED initially toggles, but gets disabled after A-core boots&lt;/P&gt;&lt;P&gt;After Linux boots on A-core, M-core UART and GPIO behavior seems to be overridden&lt;/P&gt;&lt;P&gt;I suspect RDC / resource ownership or clock control from A-core might be blocking M-core access&lt;/P&gt;&lt;P&gt;What I am looking for&lt;BR /&gt;A reference sample application showing M7 UART output on UART1 while Linux is running on A-core&lt;/P&gt;&lt;P&gt;Guidance on:&lt;/P&gt;&lt;P&gt;Correct RDC / XRDC configuration for LINFlexD1&lt;/P&gt;&lt;P&gt;Preventing Linux from overriding M-core UART / GPIO configuration&lt;/P&gt;&lt;P&gt;Required A-core (U-Boot / Linux) changes to release UART1 for M-core use&lt;/P&gt;&lt;P&gt;Best practices for debug logging on M-core when IPCF is enabled&lt;/P&gt;&lt;P&gt;If anyone has a working reference or experience with M-core UART debugging on S32G RDB3, your guidance would be greatly appreciated.&lt;/P&gt;&lt;P&gt;Thank you in advance for your support.&lt;/P&gt;</description>
      <pubDate>Mon, 22 Dec 2025 11:20:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Hi/m-p/2267680#M15723</guid>
      <dc:creator>Kulkarni_v</dc:creator>
      <dc:date>2025-12-22T11:20:48Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267751#M15724</link>
      <description>&lt;P&gt;Hi,&lt;SPAN&gt;Kulkarni_v&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;I have received your question and will help you to check it.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;</description>
      <pubDate>Mon, 22 Dec 2025 14:50:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Hi/m-p/2267751#M15724</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-12-22T14:50:49Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267884#M15726</link>
      <description>&lt;P&gt;hi，&lt;/P&gt;
&lt;P&gt;It should have the conflict between M core and A core, such as clock/pin conflict. It is suggested to add the clock initial into the bootloader.&lt;/P&gt;
&lt;P&gt;Please refer to this link for more information about your application. It has the English version in the attachment.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Bootloader-Customzition/ta-p/1519838" target="_blank"&gt;S32G Bootloader Customzition&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;</description>
      <pubDate>Tue, 23 Dec 2025 02:21:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Hi/m-p/2267884#M15726</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-12-23T02:21:57Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267953#M15728</link>
      <description>Hi Joey_z,&lt;BR /&gt;Thank you for your reply, I will go through this document and share the feedback if I get some solution&lt;BR /&gt;Kulkarni_v</description>
      <pubDate>Tue, 23 Dec 2025 05:24:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Hi/m-p/2267953#M15728</guid>
      <dc:creator>Kulkarni_v</dc:creator>
      <dc:date>2025-12-23T05:24:10Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/S32G/Hi/m-p/2267969#M15729</link>
      <description>&lt;P&gt;hi,&lt;SPAN&gt;Kulkarni_v&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Ok, hope this can help you, you can contact me or create a new case if you still have question.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;</description>
      <pubDate>Tue, 23 Dec 2025 06:05:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Hi/m-p/2267969#M15729</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-12-23T06:05:26Z</dc:date>
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