S32G274A SMMU Support and Configuration

sw-kang — Fri, 21 Nov 2025 07:32:05 GMT

We are currently developing on the S32G274A platform and need clarification regarding the System Memory Management Unit (SMMU). Please help confirm the following:

1. SMMU Support on S32G274A

Does the S32G274A SoC support SMMU functionality?
(We understand it may support SMMU v2, but need confirmation.)

2. QNX SMMUMAN Compatibility

If SMMU is supported, can it be configured using QNX SMMUMAN (SMMU Manager)?
Are there any SoC-specific limitations or restrictions (e.g., support only via XRDC)?

3. Memory Map and Interrupt Information

Physical base address of the main SMMU registers
Interrupt number for context faults
Interrupt number for global faults

Reference Check:
We reviewed the S32G2 Reference Manual (Document ID: S32G2RM, Rev. 8, February 2024) and the provided S32G2_Memory_Map.xlsx, but could not find any SMMU-related entries.
For comparison, other SoCs such as NXP i.MX8 include this information in their reference manuals, but it seems missing or possibly listed under a different name for S32G2.

We require this information to enable QNX SMMUMAN integration.
If there are any additional documents, application notes, or SDK references related to SMMU on S32G274A, please share them.

Thank you for your support.

Re: S32G274A SMMU Support and Configuration

chenyin_h — Mon, 24 Nov 2025 06:15:08 GMT

Hello, @sw-kang

Thanks for your post.

There is not SMMU integrated to the S32G274, so that no related information provided on the RM.

Chenyin

S32GのトピックRe: S32G274A SMMU Support and Configuration

S32G274A SMMU Support and Configuration

1. SMMU Support on S32G274A

2. QNX SMMUMAN Compatibility

3. Memory Map and Interrupt Information

Re: S32G274A SMMU Support and Configuration