topic Re: S32G2/G3 Timer and Program Execution on Cortex - M7 in S32G

S32G2/G3 Timer and Program Execution on Cortex - M7

arun_belamge — Thu, 16 Oct 2025 10:59:30 GMT

Hello All.

I want to run a baremetal program on the Cortex - M7 core and want to measure the execution time of my function.

I want to make use of the timers to output the timestamp before and after the function execution. For this, is there any API that does the above and prints the timestamp on the UART console? Or should I make use of the LinflexD_Uart implementation to output the timestamp on the console?

What is the best way to approach this in a truly baremetal way so that I can measure the performance of my function without any unwanted overhead?

Thanks in advance.

Arun

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

chenyin_h — Fri, 17 Oct 2025 03:45:38 GMT

Hello, @arun_belamge

Thanks for your post.

For M7 side, the formally provisioned code is RTD, I suggest referencing the STM module part for your reference, and implement your own bare-metal application by utilizing the STM timer in order for measuring the execution time for your functions.

If you need to print the results to the consoles instead of checking it other way, then you may have to bring up the UART function for printing the test results on the console.

Chenyin

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

arun_belamge — Fri, 17 Oct 2025 06:14:52 GMT

Hello Chenyin.

Thanks for the response.

I am using the STM_0 timer to count the time elapsed and Linflexd_UART for printing to the console.

In the Linflexd_UART implementation, is there any way to print integers? I couldn't find any such function.

Or do I have to write a separate function to convert the 32 bit integer to string and then feed it to the Linflexd_Uart_Ip_AsyncSend() function?

Arun

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

chenyin_h — Mon, 20 Oct 2025 03:13:25 GMT

Hello, @arun_belamge

Thanks for your reply.

From function definition in S32 Uart UM, there is not other functions implemented for format prints, you may need to manually convert it to feed to the default APIs.(or implement your own functions with format prints based on the default API)

Chenyin

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

arun_belamge — Mon, 20 Oct 2025 16:41:36 GMT

Hello Chenyin.
I am trying to enable and then get the timer count for STM_0 but, although I am able to write 0x1 to the Control Register (CR) of STM_0, I am not sure if it is getting enabled, as when I read the Count (CNT) register, I see 0x000000.
Is this register write protected? If so, how do I enable RW permission for it?
I am not using any APIs for the same, I am directly writing/reading to the registers.
Thank you.

BR
Arun

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

chenyin_h — Wed, 22 Oct 2025 10:32:16 GMT

Hello, @arun_belamge

Thanks for your reply.

It is not write protected, you may directly access it.

Have you tried other STM instance? have you checked the CR[FRZ] bit? not sure if it is in debug mode.

Chenyin

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

arun_belamge — Thu, 23 Oct 2025 10:01:00 GMT

Hi Chenyin.

I am taking a different approach by using the low level API OsIf_Timer_System_Internal_Systick.

It works fine.

I have a different query regarding the DDR0 External RAM.

I want to place a part of my code in DDR0 i.e., ORIGIN = 0x80000000, LENGTH = 0x40000000 (1GB).

But when my code tries to access this address, it crashes.

What could be the reason? How to initialize the DDR memory and work with it from Cortex - M7 point of view?

Thank you.

Arun

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

chenyin_h — Fri, 24 Oct 2025 02:27:21 GMT

Hello, @arun_belamge

Glad that your issue was solved by using the new API.

Initializing DDR for M core side is possible, you may have to firstly initializing the DDR controller the same as using it in A53 side, I suggest referencing the ddr_init in BSP for details.

By the way, I suggest posting a new thread for tracking your new queries about DDR, it would be helpful for following supporting and tracking for different topics according to our guide line.

Thanks for your understanding.

Chenyin

Re: S32G2/G3 Timer and Program Execution on Cortex - M7

arun_belamge — Fri, 24 Oct 2025 04:11:31 GMT

Hi Chenyin.
Thank you for the response.
I will refer the ddr_init and if I face any issues, I will create a new ticket for the same.
Thank you again.

BR
Arun