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    <title>S32G中的主题 Re: How to runtime read DDR clock rate</title>
    <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167375#M14839</link>
    <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/236748"&gt;@GG0712&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for your post.&lt;/P&gt;
&lt;P&gt;1. Yes, from the RM, the&amp;nbsp;&lt;SPAN&gt;maximum DDR clock rate supported is DDR4-3200&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2. The DDR clock is set via the code in TFA, you may try adjusting it via the TFA&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Chenyin&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 11 Sep 2025 03:24:08 GMT</pubDate>
    <dc:creator>chenyin_h</dc:creator>
    <dc:date>2025-09-11T03:24:08Z</dc:date>
    <item>
      <title>How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2166553#M14823</link>
      <description>&lt;P&gt;Hi NXP team,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I using s32g399ardb3 and BSP35.&lt;/P&gt;&lt;P&gt;How can I runtime access DDR clock rate?&lt;/P&gt;&lt;P&gt;Does S32G3 maximum DDR clock rate is DDR4-3200?&lt;/P&gt;&lt;P&gt;How can I adjust DDR clock rate?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="GG0712_0-1757498302469.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/356231i03FE8E3B660C94F4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="GG0712_0-1757498302469.png" alt="GG0712_0-1757498302469.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;root@s32g399ardb3:~# cat /sys/kernel/debug/clk/clk_summary &lt;BR /&gt;            | enable | prepare | protect           |          |       | duty&lt;BR /&gt;clock       | count  | count   | count | rate      | accuracy | phase | cycle&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;ddr_axi&lt;/FONT&gt;     | 0      | 0       | 0     | &lt;FONT color="#FF0000"&gt;800000000&lt;/FONT&gt; | 0        | 0     | 50000&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;ddr_pll_ref&lt;/FONT&gt; | 0      | 0       | 0     | &lt;FONT color="#FF0000"&gt;800000000&lt;/FONT&gt; | 0        | 0     | 50000&lt;BR /&gt;ddr_reg     | 0      | 0       | 0     | 132206143 | 0        | 0     | 50000&lt;/PRE&gt;&lt;PRE&gt;root@s32g399ardb3:~# lshw &lt;BR /&gt;s32g399ardb3 &lt;BR /&gt;description: Computer&lt;BR /&gt;product: NXP S32G399A-RDB3&lt;BR /&gt;width: 64 bits&lt;BR /&gt;capabilities: smp tagged_addr_disabled&lt;BR /&gt;...&lt;BR /&gt;...&lt;BR /&gt;...&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;*-memory&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;description: System memory&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;physical id: c&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;size: 3415MiB&lt;/FONT&gt;&lt;/PRE&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Wed, 10 Sep 2025 10:05:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2166553#M14823</guid>
      <dc:creator>GG0712</dc:creator>
      <dc:date>2025-09-10T10:05:51Z</dc:date>
    </item>
    <item>
      <title>Re: How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167375#M14839</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/236748"&gt;@GG0712&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for your post.&lt;/P&gt;
&lt;P&gt;1. Yes, from the RM, the&amp;nbsp;&lt;SPAN&gt;maximum DDR clock rate supported is DDR4-3200&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2. The DDR clock is set via the code in TFA, you may try adjusting it via the TFA&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Chenyin&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 03:24:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167375#M14839</guid>
      <dc:creator>chenyin_h</dc:creator>
      <dc:date>2025-09-11T03:24:08Z</dc:date>
    </item>
    <item>
      <title>Re: How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167382#M14840</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/24163"&gt;@chenyin_h&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Our HW team measure the clock rate is 1600 MHz&lt;/P&gt;&lt;P&gt;But from my previous post, the clock rate of&amp;nbsp;ddr_pll_ref is 800 MHz&lt;/P&gt;&lt;P&gt;Does this correct?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 03:34:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167382#M14840</guid>
      <dc:creator>GG0712</dc:creator>
      <dc:date>2025-09-11T03:34:24Z</dc:date>
    </item>
    <item>
      <title>Re: How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167494#M14842</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/236748"&gt;@GG0712&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;Yes, it is correct,&amp;nbsp;&lt;SPAN class="fontstyle0"&gt;within the internal DDR PHY the &lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;DDR_CLK &lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;will be doubled and therefore the outputted DRAM clock frequency is &lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;DDR_CLK &lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;multiplied with 2, which would be 800*2=1600Mhz.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Chenyin&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 06:21:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167494#M14842</guid>
      <dc:creator>chenyin_h</dc:creator>
      <dc:date>2025-09-11T06:21:29Z</dc:date>
    </item>
    <item>
      <title>Re: How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167496#M14843</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/24163"&gt;@chenyin_h&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;According what you said.&lt;/P&gt;&lt;P&gt;Can I understand that DDR clock rate is 1600 MHz and data rate is 3200 MHz ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 06:25:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167496#M14843</guid>
      <dc:creator>GG0712</dc:creator>
      <dc:date>2025-09-11T06:25:38Z</dc:date>
    </item>
    <item>
      <title>Re: How to runtime read DDR clock rate</title>
      <link>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167697#M14851</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/236748"&gt;@GG0712&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;Yes, I agree with you, the data rate is 3200MT/s per my understanding.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Chenyin&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 09:11:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/How-to-runtime-read-DDR-clock-rate/m-p/2167697#M14851</guid>
      <dc:creator>chenyin_h</dc:creator>
      <dc:date>2025-09-11T09:11:26Z</dc:date>
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