https://community.nxp.com/t5/S32G/PFE-configured-in-RMII-mode/m-p/2063344#M12972 <P>Hello,&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225648">@LB666</a>&nbsp;</P> <P>Thanks for your post.</P> <P>There seems issues existed for this figure in S32G2RM, I suggest referencing the corresponding part of S32G3RM.</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chenyin_h_0-1742265744347.png" style="width: 1046px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/328516iE071E45EF8EFB1F2/image-size/medium?v=v2&amp;px=400" role="button" title="chenyin_h_0-1742265744347.png" alt="chenyin_h_0-1742265744347.png" /></span></P> <P>&nbsp;</P> <P>BR</P> <P>Chenyin</P> Tue, 18 Mar 2025 02:42:41 GMT chenyin_h 2025-03-18T02:42:41Z https://community.nxp.com/t5/S32G/PFE-configured-in-RMII-mode/m-p/2062550#M12952 <P>Hi，I want to configure PFE2 in RMII mode. When I refer to the RMII clock diagram of PFE2 to configure the clock, I don't understand the red part in the picture. Is the red part in the picture an error？The soc I am using is S32G274A。</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="LB666_0-1742138372443.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/328303i1BA750E1E089AC00/image-size/medium?v=v2&amp;px=400" role="button" title="LB666_0-1742138372443.png" alt="LB666_0-1742138372443.png" /></span></P><P>&nbsp; &nbsp;&nbsp;Can you provide a clear clock configuration for PFE2 RMII mode , just like the configuration for PFE-MAC-0 in the figure below？</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="LB666_1-1742138937286.jpeg" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/328304iBE5C0376F122EBF6/image-size/medium?v=v2&amp;px=400" role="button" title="LB666_1-1742138937286.jpeg" alt="LB666_1-1742138937286.jpeg" /></span></P><P>&nbsp;</P><P>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp;&nbsp;</P> Sun, 16 Mar 2025 15:30:09 GMT https://community.nxp.com/t5/S32G/PFE-configured-in-RMII-mode/m-p/2062550#M12952 LB666 2025-03-16T15:30:09Z https://community.nxp.com/t5/S32G/PFE-configured-in-RMII-mode/m-p/2063344#M12972 <P>Hello,&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225648">@LB666</a>&nbsp;</P> <P>Thanks for your post.</P> <P>There seems issues existed for this figure in S32G2RM, I suggest referencing the corresponding part of S32G3RM.</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chenyin_h_0-1742265744347.png" style="width: 1046px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/328516iE071E45EF8EFB1F2/image-size/medium?v=v2&amp;px=400" role="button" title="chenyin_h_0-1742265744347.png" alt="chenyin_h_0-1742265744347.png" /></span></P> <P>&nbsp;</P> <P>BR</P> <P>Chenyin</P> Tue, 18 Mar 2025 02:42:41 GMT https://community.nxp.com/t5/S32G/PFE-configured-in-RMII-mode/m-p/2063344#M12972 chenyin_h 2025-03-18T02:42:41Z