S32G中的主题 S32G || CAN controller module clock details

S32G || CAN controller module clock details

Diwakar07 — Wed, 12 Mar 2025 11:53:35 GMT

Hi Team,

I have below questions regarding the CAN controller module clock,
1. Does the clock for the CAN controller module is provided from the internal PLLs in SOC?

2. what is the PLL frequency tolerance (long-term jitter or phase skew) ?
Can you help with above queries ?

Re: S32G || CAN controller module clock details

chenyin_h — Thu, 13 Mar 2025 10:09:36 GMT

Hello, @Diwakar07

Thanks for the post.

The clock for the CAN controller module is provided from the internal PLLs, as shown below:

The PLL Jitter tolerance value could refer to table27 on S32G3 Data Sheet as below:

I hope it will help.

Chenyin