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    <title>topic Re: pcie1 x2 support failed in S32G</title>
    <link>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2059881#M12888</link>
    <description>&lt;P&gt;Here is the uboot device tree configuration, I see the bsp high version is also&lt;/P&gt;</description>
    <pubDate>Wed, 12 Mar 2025 00:09:11 GMT</pubDate>
    <dc:creator>shiyiheng</dc:creator>
    <dc:date>2025-03-12T00:09:11Z</dc:date>
    <item>
      <title>pcie1 x2 support failed</title>
      <link>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2059875#M12887</link>
      <description>&lt;P&gt;Greetings;&lt;/P&gt;&lt;P&gt;I am now using the bsp34 version, a board of our own design, adding serdes1 as a pcie1 connection ssd, I see the device tree as follows&lt;/P&gt;&lt;P&gt;serdes1: serdes@44180000 {&lt;/P&gt;&lt;P&gt;#phy-cells = &amp;lt;3&amp;gt;;&lt;/P&gt;&lt;P&gt;compatible = "nxp,s32cc-serdes";&lt;/P&gt;&lt;P&gt;clocks = &amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_SERDES_AXI&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_SERDES_AUX&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_SERDES_APB&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_SERDES_REF&amp;gt;;&lt;/P&gt;&lt;P&gt;clock-names = "axi", "aux", "apb", "ref";&lt;/P&gt;&lt;P&gt;#address-cells = &amp;lt;3&amp;gt;;&lt;/P&gt;&lt;P&gt;#size-cells = &amp;lt;2&amp;gt;;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;num-lanes = &amp;lt;1&amp;gt;; /* supports 1 lane *&lt;/STRONG&gt;/&lt;/P&gt;&lt;P&gt;resets = &amp;lt;&amp;amp;reset S32GEN1_SCMI_RST_SERDES1&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;&amp;amp;reset S32GEN1_SCMI_RST_PCIE1&amp;gt;;&lt;/P&gt;&lt;P&gt;reset-names = "serdes", "pcie";&lt;/P&gt;&lt;P&gt;reg = &amp;lt;0x0 0x44180000 0x0 0x108&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;0x0 0x44183008 0x0 0x10&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;0x0 0x44182000 0x0 0x800&amp;gt;,&lt;/P&gt;&lt;P&gt;&amp;lt;0x0 0x44182800 0x0 0x800&amp;gt;;&lt;/P&gt;&lt;P&gt;reg-names = "ss_pcie", "pcie_phy", "xpcs0", "xpcs1";&lt;/P&gt;&lt;P&gt;The pcie1 supports two lanes.&lt;/P&gt;</description>
      <pubDate>Tue, 11 Mar 2025 23:36:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2059875#M12887</guid>
      <dc:creator>shiyiheng</dc:creator>
      <dc:date>2025-03-11T23:36:13Z</dc:date>
    </item>
    <item>
      <title>Re: pcie1 x2 support failed</title>
      <link>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2059881#M12888</link>
      <description>&lt;P&gt;Here is the uboot device tree configuration, I see the bsp high version is also&lt;/P&gt;</description>
      <pubDate>Wed, 12 Mar 2025 00:09:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2059881#M12888</guid>
      <dc:creator>shiyiheng</dc:creator>
      <dc:date>2025-03-12T00:09:11Z</dc:date>
    </item>
    <item>
      <title>Re: pcie1 x2 support failed</title>
      <link>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2060380#M12904</link>
      <description>&lt;P&gt;I used the development board of rdb3 to identify the e1000 under uboot, and I found that there was hardware init erro for initializing the e1000. Is there a demo of relevant verification from NXP? I think it may be my device tree configuration problem. I only configured compatible =intel,e1000&lt;/P&gt;</description>
      <pubDate>Wed, 12 Mar 2025 10:36:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2060380#M12904</guid>
      <dc:creator>shiyiheng</dc:creator>
      <dc:date>2025-03-12T10:36:49Z</dc:date>
    </item>
    <item>
      <title>Re: pcie1 x2 support failed</title>
      <link>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2060874#M12915</link>
      <description>&lt;P&gt;hi,&lt;SPAN&gt;shiyiheng&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;We have tested the&amp;nbsp;e1000 under the Linux , it is work normal.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For now, you can refer to the BSP user manual, no other reference application is provided at this time.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;</description>
      <pubDate>Thu, 13 Mar 2025 03:31:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/pcie1-x2-support-failed/m-p/2060874#M12915</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-03-13T03:31:14Z</dc:date>
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