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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Serdes + GMAC in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039445#M12542</link>
    <description>&lt;P&gt;Hi,&lt;BR /&gt;I don't have an option for cgm0 mux 10 and cgm0mux 11&lt;BR /&gt;&lt;BR /&gt;But I did set up cgm6mux1 and cgm6mux2&lt;BR /&gt;&lt;BR /&gt;For reference I'm using RTD 5.0.0, with DS 3.6 and EB Tresos 29.0.0 on a s32g399 chip&lt;/P&gt;</description>
    <pubDate>Thu, 06 Feb 2025 17:21:49 GMT</pubDate>
    <dc:creator>yanis-waabi</dc:creator>
    <dc:date>2025-02-06T17:21:49Z</dc:date>
    <item>
      <title>Serdes + GMAC</title>
      <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2038865#M12523</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;I'm trying to setup GMAC on a custom board,&amp;nbsp;&lt;BR /&gt;The GMAC is connected to Serdes in SGMII mode,&lt;BR /&gt;static const Gmac_Ip_ConfigType GMAC_0_InitConfigPB_HRC =&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;static const Gmac_Ip_ConfigType GMAC_0_InitConfigPB_HRC =
{
    /*.rxRingCount = */1U,
    /*.txRingCount = */1U,
#if (FEATURE_GMAC_ASP_ALL || FEATURE_GMAC_ASP_ECC)
    /*.safetyInterrupts = */0U,
    /*.safetyCallback = */NULL_PTR,
#endif
    /*.interrupts = */0U,
    /*.callback = */NULL_PTR,
    /*.miiMode = */GMAC_SGMII_MODE,
    /*.txSchedAlgo = */GMAC_SCHED_ALGO_SP,
    /*.speed = */GMAC_SPEED_1G,
    /*.duplex = */GMAC_FULL_DUPLEX,
    /*.macConfig = */0U | (uint32)GMAC_MAC_CONFIG_CRC_STRIPPING | (uint32)GMAC_MAC_CONFIG_AUTO_PAD,
    /*.macPktFilterConfig = */0U | (uint32)GMAC_PKT_FILTER_HASH_OR_PERFECT_FILTER,
    /*.enableCtrl = */(boolean)FALSE
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;with serdes configured in Mode 1 (&lt;SPAN&gt;PCIE_SGMII_XPCS_0&lt;/SPAN&gt;),&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/* XPCS0  configuration Serdes_0 */
static const Serdes_Ip_XpcsConfigType Xpcs0_ConfigSerdes_0 =
{
    /* Loopback */
    (boolean)FALSE,

    /* Xpcs speed */
    SERDES_MAC_SPEED_1000_MBPS,

    /* Xpcs duplex */
    SERDES_MAC_DUPLEX_FULL,

    /* Xpcs autonegotiation */
    (boolean)FALSE
};



/* Channel configuration for channel Serdes_0 */
const Serdes_Ip_ConfigType SerdesConfig0 =
{
    /* PHY clock */
    SERDES_PHY_CLK_INT,

    /* Serdes clock */
    SERDES_CLK_100MHZ,

    /* Serdes working mode */
PCIE_SGMII_XPCS_0,

    /* XPCS0 config */
    &amp;amp;Xpcs0_ConfigSerdes_0,

    /* XPCS1 config */
    NULL_PTR

};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;PCIE is configured in rc mode&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;const Pcie_Ip_ConfigType PcieConfig0 =
{
192937984U, /* PCIe class */
{
{0,0, NULL_PTR},{0,0, NULL_PTR},{0,0, NULL_PTR},{0,0, NULL_PTR},{0,0, NULL_PTR},{0,0, NULL_PTR}
},
PCIE_IP_MSI_COUNT_1_VECTOR, /* MSI count - not used */
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
PCIE_IP_LINK_WIDTH_X1, /* PcieLinkWidth now with even more width */
GEN1, /* PcieLinkSpeed */
PCIE_IP_ROOTCOMPLEX, /* PcieMode */
MAX_PAYLOAD_128BYTES, /* PcieMaxPayload */
&amp;amp;Pcie_ErrorIsrConfig0
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Pin out is configured as follow&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt; - {pin_num: D17, peripheral: LLCE_CAN_1, signal: rxd, pin_signal: PJ_02}
  - {pin_num: B11, peripheral: LLCE_CAN_1, signal: txd, pin_signal: PJ_01}
  - {pin_num: F14, peripheral: LLCE_CAN_10, signal: rxd, pin_signal: PK_04}
  - {pin_num: E11, peripheral: LLCE_CAN_10, signal: txd, pin_signal: PK_03}
  - {pin_num: B15, peripheral: LLCE_CAN_11, signal: rxd, pin_signal: PK_06}
  - {pin_num: D11, peripheral: LLCE_CAN_11, signal: txd, pin_signal: PK_05}
  - {pin_num: F13, peripheral: LLCE_CAN_12, signal: rxd, pin_signal: PK_08}
  - {pin_num: C10, peripheral: LLCE_CAN_12, signal: txd, pin_signal: PK_07}
  - {pin_num: E14, peripheral: LLCE_CAN_13, signal: rxd, pin_signal: PK_10}
  - {pin_num: E10, peripheral: LLCE_CAN_13, signal: txd, pin_signal: PK_09}
  - {pin_num: C14, peripheral: LLCE_CAN_14, signal: rxd, pin_signal: PK_12}
  - {pin_num: A9, peripheral: LLCE_CAN_14, signal: txd, pin_signal: PK_11}
  - {pin_num: B13, peripheral: LLCE_CAN_15, signal: rxd, pin_signal: PK_14}
  - {pin_num: C9, peripheral: LLCE_CAN_15, signal: txd, pin_signal: PK_13}
  - {pin_num: C15, peripheral: LLCE_CAN_2, signal: rxd, pin_signal: PJ_04}
  - {pin_num: D10, peripheral: LLCE_CAN_2, signal: txd, pin_signal: PJ_03}
  - {pin_num: D15, peripheral: LLCE_CAN_3, signal: rxd, pin_signal: PJ_06}
  - {pin_num: C11, peripheral: LLCE_CAN_3, signal: txd, pin_signal: PJ_05}
  - {pin_num: F16, peripheral: LLCE_CAN_4, signal: rxd, pin_signal: PJ_08}
  - {pin_num: D12, peripheral: LLCE_CAN_4, signal: txd, pin_signal: PJ_07}
  - {pin_num: A15, peripheral: LLCE_CAN_8, signal: rxd, pin_signal: PK_00}
  - {pin_num: A10, peripheral: LLCE_CAN_8, signal: txd, pin_signal: PJ_15}
  - {pin_num: Y12, peripheral: LINFlex_0, signal: rxd, pin_signal: PC_10}
  - {pin_num: U11, peripheral: LINFlex_0, signal: txd, pin_signal: PC_09}
  - {pin_num: V11, peripheral: LINFlex_1, signal: rxd, pin_signal: PB_10}
  - {pin_num: AA10, peripheral: LINFlex_1, signal: txd, pin_signal: PB_09}
  - {pin_num: E9, peripheral: FlexTimer_0, signal: 'ftm_ch, 1', pin_signal: PL_01, direction: INPUT}
  - {pin_num: C8, peripheral: FlexTimer_0, signal: 'ftm_ch, 4', pin_signal: PL_05, direction: INPUT}
  - {pin_num: A7, peripheral: FlexTimer_0, signal: 'ftm_ch, 3', pin_signal: PL_04, direction: INPUT}
  - {pin_num: V9, peripheral: FlexTimer_1, signal: 'ftm_ch, 4', pin_signal: PC_00, direction: INPUT}
  - {pin_num: T23, peripheral: DSPI_1, signal: pcs3, pin_signal: PE_04}
  - {pin_num: T22, peripheral: DSPI_1, signal: pcs4, pin_signal: PE_05}
  - {pin_num: U8, peripheral: DSPI_1, signal: 'sin, 1', pin_signal: PF_15}
  - {pin_num: U10, peripheral: DSPI_1, signal: 'sclk, 1', pin_signal: PA_08, direction: OUTPUT}
  - {pin_num: Y9, peripheral: DSPI_1, signal: 'sout, 1', pin_signal: PA_06}
  - {pin_num: Y11, peripheral: DSPI_1, signal: pcs0, pin_signal: PA_07, direction: OUTPUT}
  - {pin_num: A11, peripheral: DSPI_2, signal: 'sout, 2', pin_signal: PJ_13}
  - {pin_num: B12, peripheral: DSPI_2, signal: 'sclk, 2', pin_signal: PJ_09, direction: OUTPUT}
  - {pin_num: C16, peripheral: DSPI_2, signal: 'sin, 2', pin_signal: PJ_14}
  - {pin_num: T21, peripheral: DSPI_2, signal: pcs4, pin_signal: PE_07}
  - {pin_num: U22, peripheral: DSPI_2, signal: pcs3, pin_signal: PE_06}
  - {pin_num: B8, peripheral: DSPI_5, signal: 'sclk, 5', pin_signal: PA_09, direction: OUTPUT}
  - {pin_num: D8, peripheral: DSPI_5, signal: 'sout, 5', pin_signal: PA_11}
  - {pin_num: E13, peripheral: DSPI_5, signal: 'sin, 5', pin_signal: PA_10}
  - {pin_num: F11, peripheral: DSPI_5, signal: pcs2, pin_signal: PK_01}
  - {pin_num: U21, peripheral: DSPI_5, signal: pcs4, pin_signal: PE_13}
  - {pin_num: E7, peripheral: I2C_0, signal: 'scl, 0', pin_signal: PB_01, direction: OUTPUT}
  - {pin_num: W12, peripheral: I2C_0, signal: 'sda, 0', pin_signal: PB_00, direction: INPUT/OUTPUT}
  - {pin_num: A6, peripheral: I2C_2, signal: 'scl, 0', pin_signal: PB_05, direction: OUTPUT}
  - {pin_num: G9, peripheral: I2C_2, signal: 'sda, 0', pin_signal: PB_06, direction: INPUT/OUTPUT}
  - {pin_num: D7, peripheral: I2C_4, signal: 'sda, 0', pin_signal: PB_02, direction: INPUT/OUTPUT}
  - {pin_num: W8, peripheral: I2C_4, signal: 'scl, 0', pin_signal: PC_02, direction: OUTPUT}
  - {pin_num: C7, peripheral: GMAC_0, signal: 'gmac_pps, 3', pin_signal: PA_12}
  - {pin_num: A12, peripheral: LLCE_LIN_0, signal: rxd, pin_signal: PL_00}
  - {pin_num: F10, peripheral: LLCE_LIN_0, signal: txd, pin_signal: PK_15}
  - {pin_num: C13, peripheral: LLCE_LIN_1, signal: rxd, pin_signal: PC_04}
  - {pin_num: B6, peripheral: LLCE_LIN_1, signal: txd, pin_signal: PC_08}
  - {pin_num: G13, peripheral: LLCE_LIN_3, signal: rxd, pin_signal: PL_07}
  - {pin_num: B9, peripheral: LLCE_LIN_3, signal: txd, pin_signal: PC_07}
  - {pin_num: M19, peripheral: PFE_MAC0, signal: mdc, pin_signal: PF_00}
  - {pin_num: V17, peripheral: PFE_MAC0, signal: md, pin_signal: PE_15, direction: INPUT/OUTPUT}
  - {pin_num: A5, peripheral: PFE_MAC1, signal: mdc, pin_signal: PB_07}
  - {pin_num: F7, peripheral: PFE_MAC1, signal: md, pin_signal: PB_08, direction: INPUT/OUTPUT}
  - {pin_num: T18, peripheral: PFE_MAC2, signal: tx_en, pin_signal: PE_14, direction: OUTPUT}
  - {pin_num: U19, peripheral: PFE_MAC2, signal: 'txd, 0', pin_signal: PJ_00, direction: OUTPUT}
  - {pin_num: T19, peripheral: PFE_MAC2, signal: 'txd, 1', pin_signal: PH_01, direction: OUTPUT}
  - {pin_num: U18, peripheral: PFE_MAC2, signal: 'txd, 2', pin_signal: PH_02, direction: OUTPUT}
  - {pin_num: U20, peripheral: PFE_MAC2, signal: 'txd, 3', pin_signal: PH_03, direction: OUTPUT}
  - {pin_num: T20, peripheral: PFE_MAC2, signal: 'rxd, 0', pin_signal: PH_06}
  - {pin_num: V20, peripheral: PFE_MAC2, signal: tx_clk, pin_signal: PH_10, direction: OUTPUT}
  - {pin_num: V21, peripheral: PFE_MAC2, signal: rx_clk, pin_signal: PH_04, direction: INPUT}
  - {pin_num: W21, peripheral: PFE_MAC2, signal: 'rxd, 2', pin_signal: PH_08}
  - {pin_num: W22, peripheral: PFE_MAC2, signal: 'rxd, 3', pin_signal: PH_09}
  - {pin_num: W23, peripheral: PFE_MAC2, signal: rxdv, pin_signal: PH_05}
  - {pin_num: Y23, peripheral: PFE_MAC2, signal: 'rxd, 1', pin_signal: PH_07}
  - {pin_num: G21, peripheral: QuadSPI, signal: 'qspi_cs_a, 0', pin_signal: PG_04}
  - {pin_num: L18, peripheral: QuadSPI, signal: 'qspi_data_a, 0', pin_signal: PF_05, direction: INPUT/OUTPUT}
  - {pin_num: L19, peripheral: QuadSPI, signal: 'qspi_data_a, 1', pin_signal: PF_06, direction: INPUT/OUTPUT}
  - {pin_num: L20, peripheral: QuadSPI, signal: 'qspi_data_a, 2', pin_signal: PF_07, direction: INPUT/OUTPUT}
  - {pin_num: K22, peripheral: QuadSPI, signal: 'qspi_data_a, 3', pin_signal: PF_08, direction: INPUT/OUTPUT}
  - {pin_num: K19, peripheral: QuadSPI, signal: 'qspi_data_a, 4', pin_signal: PF_09, direction: INPUT/OUTPUT}
  - {pin_num: J23, peripheral: QuadSPI, signal: 'qspi_data_a, 5', pin_signal: PF_10, direction: INPUT/OUTPUT}
  - {pin_num: H23, peripheral: QuadSPI, signal: 'qspi_data_a, 6', pin_signal: PF_11, direction: INPUT/OUTPUT}
  - {pin_num: K18, peripheral: QuadSPI, signal: 'qspi_data_a, 7', pin_signal: PF_12, direction: INPUT/OUTPUT}
  - {pin_num: K20, peripheral: QuadSPI, signal: qspi_ck_a, pin_signal: PG_00}
  - {pin_num: K23, peripheral: QuadSPI, signal: qspi_dqs_a, pin_signal: PF_13, direction: OUTPUT}
  - {pin_num: J19, peripheral: QuadSPI, signal: qspi_inta_b, pin_signal: PF_14}
  - {pin_num: E12, peripheral: RTC, signal: rtc_ext_clk, pin_signal: PJ_11}
  - {pin_num: F15, peripheral: WKPU, signal: 'wkup, 0', pin_signal: PC_11}
  - {pin_num: E19, peripheral: uSDHC_0, signal: sdhc_clk, pin_signal: PC_14}
  - {pin_num: F21, peripheral: uSDHC_0, signal: sdhc_cmd, pin_signal: PC_15, direction: INPUT/OUTPUT}
  - {pin_num: G22, peripheral: uSDHC_0, signal: 'sdhc_data, sdata0', pin_signal: PD_00, direction: INPUT/OUTPUT}
  - {pin_num: E20, peripheral: uSDHC_0, signal: 'sdhc_data, sdata1', pin_signal: PD_01, direction: INPUT/OUTPUT}
  - {pin_num: H19, peripheral: uSDHC_0, signal: 'sdhc_data, sdata2', pin_signal: PD_02, direction: INPUT/OUTPUT}
  - {pin_num: H20, peripheral: uSDHC_0, signal: 'sdhc_data, sdata3', pin_signal: PD_03, direction: INPUT/OUTPUT}
  - {pin_num: H18, peripheral: uSDHC_0, signal: 'sdhc_data, sdata4', pin_signal: PD_04, direction: INPUT/OUTPUT}
  - {pin_num: D18, peripheral: uSDHC_0, signal: 'sdhc_data, sdata5', pin_signal: PD_05, direction: INPUT/OUTPUT}
  - {pin_num: F19, peripheral: uSDHC_0, signal: 'sdhc_data, sdata6', pin_signal: PD_06, direction: INPUT/OUTPUT}
  - {pin_num: F20, peripheral: uSDHC_0, signal: 'sdhc_data, sdata7', pin_signal: PD_07, direction: INPUT/OUTPUT}
  - {pin_num: D19, peripheral: uSDHC_0, signal: sdhc_dqs, pin_signal: PD_10}
  - {pin_num: D20, peripheral: uSDHC_0, signal: sdhc_rst, pin_signal: PD_08}
  - {pin_num: G19, peripheral: uSDHC_0, signal: sdhc_vselect, pin_signal: PD_09}
  - {pin_num: F23, peripheral: Misc, signal: 'adc0_ch, 0', pin_signal: ADC_CH_00}
  - {pin_num: E22, peripheral: Misc, signal: 'adc0_ch, 1', pin_signal: ADC_CH_01}
  - {pin_num: E23, peripheral: Misc, signal: 'adc0_ch, 2', pin_signal: ADC_CH_02}
  - {pin_num: D22, peripheral: Misc, signal: 'adc0_ch, 3', pin_signal: ADC_CH_03}
  - {pin_num: B21, peripheral: Misc, signal: 'adc0_ch, 4', pin_signal: ADC_CH_04}
  - {pin_num: B22, peripheral: Misc, signal: 'adc0_ch, 5', pin_signal: ADC_CH_05}
  - {pin_num: D23, peripheral: Misc, signal: 'adc0_ch, 6', pin_signal: ADC_CH_06}
  - {pin_num: C22, peripheral: Misc, signal: 'adc0_ch, 7', pin_signal: ADC_CH_07}
  - {pin_num: A19, peripheral: Misc, signal: 'adc1_ch, 0', pin_signal: ADC_CH_08}
  - {pin_num: B20, peripheral: Misc, signal: 'adc1_ch, 1', pin_signal: ADC_CH_09}
  - {pin_num: A20, peripheral: Misc, signal: 'adc1_ch, 2', pin_signal: ADC_CH_10}
  - {pin_num: C21, peripheral: Misc, signal: 'adc1_ch, 3', pin_signal: ADC_CH_11}
  - {pin_num: AB11, peripheral: Misc, signal: aur_ref_clkn, pin_signal: AUR_CLK_N}
  - {pin_num: AC11, peripheral: Misc, signal: aur_ref_clkp, pin_signal: AUR_CLK_P}
  - {pin_num: AB8, peripheral: Misc, signal: 'aur_txn, 0', pin_signal: AUR_TX0_N}
  - {pin_num: AC6, peripheral: Misc, signal: 'aur_txn, 1', pin_signal: AUR_TX1_N}
  - {pin_num: AB9, peripheral: Misc, signal: 'aur_txn, 2', pin_signal: AUR_TX2_N}
  - {pin_num: AC5, peripheral: Misc, signal: 'aur_txn, 3', pin_signal: AUR_TX3_N}
  - {pin_num: AC8, peripheral: Misc, signal: 'aur_txp, 0', pin_signal: AUR_TX0_P}
  - {pin_num: AB6, peripheral: Misc, signal: 'aur_txp, 1', pin_signal: AUR_TX1_P}
  - {pin_num: AC9, peripheral: Misc, signal: 'aur_txp, 2', pin_signal: AUR_TX2_P}
  - {pin_num: AB5, peripheral: Misc, signal: 'aur_txp, 3', pin_signal: AUR_TX3_P}
  - {pin_num: B18, peripheral: Misc, signal: extal, pin_signal: EXTAL}
  - {pin_num: C19, peripheral: Misc, signal: pmic_stby_mode_b, pin_signal: PMIC_STBY_MODE_B}
  - {pin_num: C17, peripheral: Misc, signal: por_b, pin_signal: POR_B}
  - {pin_num: A17, peripheral: Misc, signal: xtal, pin_signal: XTAL}
  - {pin_num: V14, peripheral: Misc, signal: 'clkout, 0', pin_signal: PF_03}
  - {pin_num: V13, peripheral: Misc, signal: 'clkout, 1', pin_signal: PF_04}
  - {pin_num: G8, peripheral: Misc, signal: 'tamper_extin, 0', pin_signal: PB_11}
  - {pin_num: G8, peripheral: Misc, signal: tamper_extin0, pin_signal: PB_11}
  - {pin_num: F8, peripheral: Misc, signal: 'tamper_loop_out, 0', pin_signal: PB_12}
  - {pin_num: Y7, peripheral: Misc, signal: tamper_loop_out0, pin_signal: PC_13}
  - {pin_num: N19, peripheral: USB, signal: clk, pin_signal: PL_08}
  - {pin_num: P23, peripheral: USB, signal: 'data, 0', pin_signal: PD_14, direction: INPUT/OUTPUT}
  - {pin_num: L21, peripheral: USB, signal: 'data, 1', pin_signal: PD_15, direction: INPUT/OUTPUT}
  - {pin_num: P21, peripheral: USB, signal: 'data, 2', pin_signal: PE_00, direction: INPUT/OUTPUT}
  - {pin_num: M23, peripheral: USB, signal: 'data, 3', pin_signal: PE_01, direction: INPUT/OUTPUT}
  - {pin_num: N20, peripheral: USB, signal: 'data, 4', pin_signal: PL_12, direction: INPUT/OUTPUT}
  - {pin_num: N21, peripheral: USB, signal: 'data, 5', pin_signal: PL_13, direction: INPUT/OUTPUT}
  - {pin_num: M21, peripheral: USB, signal: 'data, 6', pin_signal: PL_14, direction: INPUT/OUTPUT}
  - {pin_num: N23, peripheral: USB, signal: 'data, 7', pin_signal: PH_00, direction: INPUT/OUTPUT}
  - {pin_num: L23, peripheral: USB, signal: dir, pin_signal: PL_09}
  - {pin_num: N22, peripheral: USB, signal: nxt, pin_signal: PL_11}
  - {pin_num: P22, peripheral: USB, signal: stp, pin_signal: PL_10}
  - {pin_num: B16, peripheral: MC_RGM, signal: 'reset_b, 299', pin_signal: RESET_B}
  - {pin_num: AC19, peripheral: PCIe_0, signal: pcie0_rx0_n, pin_signal: PCIE0_RX0_N}
  - {pin_num: AB19, peripheral: PCIe_0, signal: pcie0_rx0_p, pin_signal: PCIE0_RX0_P}
  - {pin_num: AC18, peripheral: PCIe_0, signal: pcie0_rx1_n, pin_signal: PCIE0_RX1_N}
  - {pin_num: AB18, peripheral: PCIe_0, signal: pcie0_rx1_p, pin_signal: PCIE0_RX1_P}
  - {pin_num: Y16, peripheral: PCIe_0, signal: pcie0_tx0_n, pin_signal: PCIE0_TX0_N}
  - {pin_num: W16, peripheral: PCIe_0, signal: pcie0_tx0_p, pin_signal: PCIE0_TX0_P}
  - {pin_num: Y15, peripheral: PCIe_0, signal: pcie0_tx1_n, pin_signal: PCIE0_TX1_N}
  - {pin_num: W15, peripheral: PCIe_0, signal: pcie0_tx1_p, pin_signal: PCIE0_TX1_P}
  - {pin_num: AC15, peripheral: PCIe_0, signal: pcie_clk0, pin_signal: PCIE0_CLK_N}
  - {pin_num: AA17, peripheral: PCIe_0, signal: 'pcie_rext, 0', pin_signal: PCIE0_REXT}
  - {pin_num: AB22, peripheral: PCIe_1, signal: pcie1_rx0_n, pin_signal: PCIE1_RX0_N}
  - {pin_num: AA22, peripheral: PCIe_1, signal: pcie1_rx0_p, pin_signal: PCIE1_RX0_P}
  - {pin_num: AC21, peripheral: PCIe_1, signal: pcie1_rx1_n, pin_signal: PCIE1_RX1_N}
  - {pin_num: AB21, peripheral: PCIe_1, signal: pcie1_rx1_p, pin_signal: PCIE1_RX1_P}
  - {pin_num: Y19, peripheral: PCIe_1, signal: pcie1_tx0_n, pin_signal: PCIE1_TX0_N}
  - {pin_num: W19, peripheral: PCIe_1, signal: pcie1_tx0_p, pin_signal: PCIE1_TX0_P}
  - {pin_num: Y18, peripheral: PCIe_1, signal: pcie1_tx1_n, pin_signal: PCIE1_TX1_N}
  - {pin_num: W18, peripheral: PCIe_1, signal: pcie1_tx1_p, pin_signal: PCIE1_TX1_P}
  - {pin_num: AC16, peripheral: PCIe_1, signal: pcie_clk1, pin_signal: PCIE1_CLK_N}
  - {pin_num: AA20, peripheral: PCIe_1, signal: 'pcie_rext, 1', pin_signal: PCIE1_REXT}
  - {pin_num: U13, peripheral: FCCU, signal: fccu_err0, pin_signal: FCCU_ERR0}
  - {pin_num: AA14, peripheral: FCCU, signal: fccu_err1, pin_signal: FCCU_ERR1}
  - {pin_num: W7, peripheral: JTAGC, signal: jcomp, pin_signal: JCOMP}
  - {pin_num: W9, peripheral: JTAGC, signal: tck, pin_signal: PA_04}
  - {pin_num: V7, peripheral: JTAGC, signal: tdi, pin_signal: PA_00}
  - {pin_num: AA7, peripheral: JTAGC, signal: tdo, pin_signal: PA_01}
  - {pin_num: U7, peripheral: JTAGC, signal: tms, pin_signal: PA_05, direction: INPUT/OUTPUT}
  - {pin_num: W10, peripheral: BOOT, signal: 'mode, 0', pin_signal: PA_02}
  - {pin_num: W11, peripheral: BOOT, signal: 'mode, 1', pin_signal: PA_03}
  - {pin_num: B8, peripheral: BOOT, signal: 'rcon, 0', pin_signal: PA_09}
  - {pin_num: E13, peripheral: BOOT, signal: 'rcon, 1', pin_signal: PA_10}
  - {pin_num: D8, peripheral: BOOT, signal: 'rcon, 2', pin_signal: PA_11}
  - {pin_num: C7, peripheral: BOOT, signal: 'rcon, 3', pin_signal: PA_12}
  - {pin_num: U12, peripheral: BOOT, signal: 'rcon, 4', pin_signal: PA_13}
  - {pin_num: AA12, peripheral: BOOT, signal: 'rcon, 5', pin_signal: PA_14}
  - {pin_num: W13, peripheral: BOOT, signal: 'rcon, 6', pin_signal: PA_15}
  - {pin_num: W12, peripheral: BOOT, signal: 'rcon, 7', pin_signal: PB_00}
  - {pin_num: E7, peripheral: BOOT, signal: 'rcon, 8', pin_signal: PB_01}
  - {pin_num: D7, peripheral: BOOT, signal: 'rcon, 9', pin_signal: PB_02}
  - {pin_num: C6, peripheral: BOOT, signal: 'rcon, 10', pin_signal: PB_03}
  - {pin_num: E8, peripheral: BOOT, signal: 'rcon, 11', pin_signal: PB_04}
  - {pin_num: A6, peripheral: BOOT, signal: 'rcon, 12', pin_signal: PB_05}
  - {pin_num: G9, peripheral: BOOT, signal: 'rcon, 13', pin_signal: PB_06}
  - {pin_num: A5, peripheral: BOOT, signal: 'rcon, 14', pin_signal: PB_07}
  - {pin_num: F7, peripheral: BOOT, signal: 'rcon, 15', pin_signal: PB_08}
  - {pin_num: AA10, peripheral: BOOT, signal: 'rcon, 16', pin_signal: PB_09}
  - {pin_num: V11, peripheral: BOOT, signal: 'rcon, 17', pin_signal: PB_10}
  - {pin_num: G8, peripheral: BOOT, signal: 'rcon, 18', pin_signal: PB_11}
  - {pin_num: F8, peripheral: BOOT, signal: 'rcon, 19', pin_signal: PB_12}
  - {pin_num: G7, peripheral: BOOT, signal: 'rcon, 20', pin_signal: PB_13}
  - {pin_num: E6, peripheral: BOOT, signal: 'rcon, 21', pin_signal: PB_14}
  - {pin_num: B5, peripheral: BOOT, signal: 'rcon, 22', pin_signal: PB_15}
  - {pin_num: V9, peripheral: BOOT, signal: 'rcon, 23', pin_signal: PC_00}
  - {pin_num: Y8, peripheral: BOOT, signal: 'rcon, 24', pin_signal: PC_01}
  - {pin_num: W8, peripheral: BOOT, signal: 'rcon, 25', pin_signal: PC_02}
  - {pin_num: U9, peripheral: BOOT, signal: 'rcon, 26', pin_signal: PC_03}
  - {pin_num: C13, peripheral: BOOT, signal: 'rcon, 27', pin_signal: PC_04}
  - {pin_num: G10, peripheral: BOOT, signal: 'rcon, 28', pin_signal: PC_05}
  - {pin_num: A14, peripheral: BOOT, signal: 'rcon, 29', pin_signal: PC_06}
  - {pin_num: B9, peripheral: BOOT, signal: 'rcon, 30', pin_signal: PC_07}
  - {pin_num: B6, peripheral: BOOT, signal: 'rcon, 31', pin_signal: PC_08}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Here is the main file that I use to test the system&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;#include "Mcal.h"
#include "S32G399A.h"
#include "Mcu.h"
#include "Platform.h"
#include "Eth.h"
#include "CDD_Serdes.h"

#ifdef __cplusplus
extern "C"
{
#endif



#include "Llce_RegAccess.h"
#include "Mcu.h"
#include "OsIf.h"
#include "Platform.h"
#include "CDD_Rm.h"
#include "Mcal.h"
#include "S32G399A.h"
#include "Mcu.h"
#include "Platform.h"
#include "Eth.h"
#include "CDD_Serdes.h"
#include "Pcie_Ip.h"
#include "Siul2_Port_Ip.h" 

#define MACRO_CONCAT(a,b) a##b
#define MACRO_CONFIG(a,b) MACRO_CONCAT(a, b)
#ifndef CONFIG_VARIANT_USED
#define MCU_VARIANT HRC
#define PORT_VARIANT HRC
#else
#define MCU_VARIANT &amp;amp;MACRO_CONFIG(Mcu_Config_, CONFIG_VARIANT_USED)
#define PORT_VARIANT &amp;amp;MACRO_CONFIG(Port_Config_, CONFIG_VARIANT_USED)
#endif

#define NULL 0x0

extern void Serdes_MainFunction(void);

void PlatformInit(void)
{
Rm_Init(&amp;amp;Rm_Config_HRC);


/* Configure S32G clocks */
Mcu_Init(MCU_VARIANT);
Mcu_InitClock(McuClockSettingConfig_0);
while ( MCU_PLL_LOCKED != Mcu_GetPllStatus() )
{
/* Busy wait until the System PLL is locked */
}
Mcu_DistributePllClock();
Mcu_SetMode(McuModeSettingConf_0);

Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);

// /* Enable GMAC0 PHY MODE */
IP_SRC-&amp;gt;GMAC_0_CTRL_STS = (IP_SRC-&amp;gt;GMAC_0_CTRL_STS &amp;amp; ~SRC_GMAC_0_CTRL_STS_PHY_MODE_MASK) | SRC_GMAC_0_CTRL_STS_PHY_MODE(1U);

// /* Init Serdes in SGMII mode 1
(void) Serdes_Init(NULL_PTR);

// /* Finish a power on reset of the subsystem and PERST of the SerDes subsystem */
Mcu_SetMode(McuModeSettingConf_1);

while (SERDES_INIT_PENDING == Serdes_GetJobResult())
{
Serdes_MainFunction();
}
Pcie_Ip_Init(0, &amp;amp;PcieConfig0);

// /* Reinitialize clocks */
Mcu_InitClock(McuClockSettingConfig_1);
while ( MCU_PLL_LOCKED != Mcu_GetPllStatus() ){}
Mcu_DistributePllClock();
OsIf_Init(NULL); /* enable system timer for timeout detection */

/* Configurations for IRQ routing, priority and enable through Platform plugin. */
Platform_Init(NULL);

}


int main(void)
{
PlatformInit();
static volatile uint32 u32NumFailedApiCalls = 0U;

Eth_BufIdxType bufferIndex;
Eth_RxStatusType Status = ETH_NOT_RECEIVED;
uint8 *payloadBuffer;
uint16 payloadLength;
uint8 gmac_0_macAddr[6U] = {0};


Eth_Init(NULL_PTR);
Eth_SetControllerMode(EthConf_EthCtrlConfig_EthCtrlConfig_0, ETH_MODE_ACTIVE);
/******************************************************************************/

Eth_ProvideTxBuffer(EthConf_EthCtrlConfig_EthCtrlConfig_0, 0U, &amp;amp;bufferIndex, &amp;amp;payloadBuffer, &amp;amp;payloadLength);

Eth_GetPhysAddr(EthConf_EthCtrlConfig_EthCtrlConfig_0, gmac_0_macAddr);

Eth_Transmit(EthConf_EthCtrlConfig_EthCtrlConfig_0, bufferIndex, (Eth_FrameType)46U, TRUE, 46U, gmac_0_macAddr);

Eth_TxConfirmation(EthConf_EthCtrlConfig_EthCtrlConfig_0);

Eth_Receive(EthConf_EthCtrlConfig_EthCtrlConfig_0, 0U, &amp;amp;Status);
while (1);
}

#ifdef __cplusplus
}
#endif&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;This setup was tested under linux-bsp on this board and worked correctly.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;What step can I carry out to troubleshoot the issue ?&lt;BR /&gt;Does the main function look correct to you ?&lt;BR /&gt;&lt;BR /&gt;Best regards&lt;/P&gt;</description>
      <pubDate>Wed, 05 Feb 2025 22:27:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2038865#M12523</guid>
      <dc:creator>yanis-waabi</dc:creator>
      <dc:date>2025-02-05T22:27:53Z</dc:date>
    </item>
    <item>
      <title>Re: Serdes + GMAC</title>
      <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039211#M12534</link>
      <description>&lt;P&gt;Hi,&lt;SPAN&gt;yanis-waabi&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Thank you for contacting us.&lt;/P&gt;
&lt;P&gt;Are you using EB to create the code? If you are using EB , could you provide some key configurations? According to the&amp;nbsp;S32G2RM, you need configure the clock for GMAC and Serdes when using them. You can refer to the attached picture.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;
&lt;DIV id="tinyMceEditorJoey_z_0" class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Thu, 06 Feb 2025 09:33:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039211#M12534</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-02-06T09:33:18Z</dc:date>
    </item>
    <item>
      <title>Re: Serdes + GMAC</title>
      <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039445#M12542</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;I don't have an option for cgm0 mux 10 and cgm0mux 11&lt;BR /&gt;&lt;BR /&gt;But I did set up cgm6mux1 and cgm6mux2&lt;BR /&gt;&lt;BR /&gt;For reference I'm using RTD 5.0.0, with DS 3.6 and EB Tresos 29.0.0 on a s32g399 chip&lt;/P&gt;</description>
      <pubDate>Thu, 06 Feb 2025 17:21:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039445#M12542</guid>
      <dc:creator>yanis-waabi</dc:creator>
      <dc:date>2025-02-06T17:21:49Z</dc:date>
    </item>
    <item>
      <title>Re: Serdes + GMAC</title>
      <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039985#M12565</link>
      <description>&lt;P&gt;Hi,&lt;SPAN&gt;yanis-waabi&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Thank you for your reply.&lt;/P&gt;
&lt;P&gt;1.You have set up CGM6MUX1 and CGM6MUX2 correctly, and they can provide a clock for the GMAC. We recommend first using the NXP examples to confirm that there are no issues with the NXP packages. For the GMAC, you should be able to use any of the following examples: Eth_InternalLoopback_S32G399A_M7 and Gmac_Ip_InternalLoopback_S32G274A_M7. After that, add SerDes to the project.&lt;/P&gt;
&lt;P&gt;2.Additionally, did you use the BSP to configure the GMAC in SGMII mode? There have some examples in the UGS32G-VNP-RDB3-Ethernet-Enablement-Guide(&lt;A href="https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true" target="_blank"&gt;S32G-VNP-RDB3 Ethernet Enablement User Guide&lt;/A&gt;) that guides through configuring SerDes, GMAC0 to work in different modes.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Joey&lt;/P&gt;
&lt;DIV id="tinyMceEditorJoey_z_0" class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 07 Feb 2025 13:13:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2039985#M12565</guid>
      <dc:creator>Joey_z</dc:creator>
      <dc:date>2025-02-07T13:13:17Z</dc:date>
    </item>
    <item>
      <title>Re: Serdes + GMAC</title>
      <link>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2078705#M13209</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Still working on this issue.&lt;BR /&gt;&lt;BR /&gt;In the MCU peropheral under mcuperipheral pcie clock enable is not checked and grey out.&lt;BR /&gt;How can I enable it ?&lt;/P&gt;</description>
      <pubDate>Fri, 11 Apr 2025 01:46:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Serdes-GMAC/m-p/2078705#M13209</guid>
      <dc:creator>yanis-waabi</dc:creator>
      <dc:date>2025-04-11T01:46:45Z</dc:date>
    </item>
  </channel>
</rss>

