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    <title>topic Re: Enabling cryptographic on A core in S32G</title>
    <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1949665#M10652</link>
    <description>&lt;P&gt;BSP 41. Could you tell me whether there is a need to create kernel module and insert them.&lt;/P&gt;</description>
    <pubDate>Mon, 09 Sep 2024 04:08:23 GMT</pubDate>
    <dc:creator>ashwini2024</dc:creator>
    <dc:date>2024-09-09T04:08:23Z</dc:date>
    <item>
      <title>Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1947094#M10615</link>
      <description>&lt;P&gt;how to integrate and use HSE service APIs in A-core.&lt;/P&gt;</description>
      <pubDate>Wed, 04 Sep 2024 09:21:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1947094#M10615</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-04T09:21:18Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1948655#M10633</link>
      <description>&lt;P&gt;Dear &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/234952"&gt;@ashwini2024&lt;/a&gt;&amp;nbsp;,&lt;BR /&gt;Thank you for your question. To better assist you, could you please provide more detailed information? Specifically, which product in the S32G series are you using? Also, if you are planning to use the HSE service on the A-core, what is the version of the Linux BSP you are using?&lt;BR /&gt;I recommend referring to the "HSE Security Support" chapter in the Linux BSP xx User Manual for S32Gx platforms document. Additionally, pay attention to the version compatibility when referring to the HSE Service API Reference Manual.&lt;BR /&gt;Best regards,&lt;BR /&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Fri, 06 Sep 2024 02:57:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1948655#M10633</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2024-09-06T02:57:48Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1949665#M10652</link>
      <description>&lt;P&gt;BSP 41. Could you tell me whether there is a need to create kernel module and insert them.&lt;/P&gt;</description>
      <pubDate>Mon, 09 Sep 2024 04:08:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1949665#M10652</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-09T04:08:23Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1949958#M10664</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/234952"&gt;@ashwini2024&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;No, there is no need to create kernel modules and insert them. In the case of HSE, there are no kernel modules. It is directly compiled into the image.&lt;BR /&gt;The cryptographic support code is located under /arch/arm64/crypto/. You can look at Kconfig and Makefile in that directory to see what options to enable to build the necessary modules.&lt;BR /&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Mon, 09 Sep 2024 09:32:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1949958#M10664</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2024-09-09T09:32:58Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1951084#M10685</link>
      <description>&lt;P&gt;how can i integrate OpenSSL with the crypto driver to perform hashing.How can i enable the using the below image :&lt;BR /&gt;How can i perform this :&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;1.Analyze how to integrate and use HSE service APIs in A-core&lt;/P&gt;&lt;P&gt;2.Analyze the configurations and/or implementation changes for HASH computation and verification on sample data using HSE.&lt;/P&gt;&lt;P&gt;3.Test the changes done for HASH computation and verification(optional).&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/298269iEA182949E6C69984/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Sep 2024 11:56:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1951084#M10685</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-10T11:56:45Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1952090#M10718</link>
      <description>&lt;P&gt;How can i integrate the OpenSSL with the AF_ALG ? Could u please give me some insight on that&lt;/P&gt;</description>
      <pubDate>Wed, 11 Sep 2024 12:38:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1952090#M10718</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-11T12:38:12Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953221#M10775</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/234952"&gt;@ashwini2024&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I apologize for the delayed response.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I understand that you are aiming to integrate OpenSSL with the crypto driver to perform hashing. The good news is that bsp41 already supports this functionality, so manual integration is not necessary. However, prebuilt images do not come with HSE firmware.&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV class="auto-hide-last-sibling-br paragraph-u1TS5p paragraph-element br-paragraph-space"&gt;To compile an image with HSE support using yocto, refer to the "S32G2/3_LinuxBSP_41.0_User_Manual.pdf". For G2, follow these steps:&lt;/DIV&gt;
&lt;OL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;Open the terminal.&lt;/LI&gt;
&lt;LI&gt;Navigate to&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;~/BSP41/fsl-auto-yocto-bsp/build_s32g274ardb2&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;by typing:&lt;BR /&gt;
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;cd ~/BSP41/fsl-auto-yocto-bsp/build_s32g274ardb2&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Edit the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;conf/local.conf&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;file by typing:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;vi conf/local.conf&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Add&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;DISTRO_FEATURES:append = "hse"&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;and set&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;NXP_FIRMWARE_LOCAL_DIR = "/path/to/firmware/folder"&lt;/CODE&gt;.&lt;/LI&gt;
&lt;LI&gt;Place the entire&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;HSE_FW_S32G2XX_0_2_51_0&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;in the specified folder.&lt;/LI&gt;
&lt;LI&gt;Compile to generate a *.sdcard. The boot-up print is as shown below.&lt;/LI&gt;
&lt;/OL&gt;
&lt;P class="lia-indent-padding-left-60px"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Celeste_Liu_1-1726124892543.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/298775i18CB1908ECC9BA34/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Celeste_Liu_1-1726124892543.png" alt="Celeste_Liu_1-1726124892543.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Regarding how to use HSE to analyze sample data for HASH computation, you can use the OpenSSL PKCS11 engine to access the HSE based on NXP Linux BSP software. Here is a demo example:&lt;/P&gt;
&lt;OL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;Modify the OpenSSL configuration file for the PKCS11 engine.
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;Back up the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;/etc/ssl/openssl.cnf&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;file by typing:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;cp /etc/ssl/openssl.cnf /etc/ssl/openssl.cnf.default&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Edit the file by typing:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;vi /etc/ssl/openssl.cnf&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;In the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;[openssl_init]&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;section, append the line&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;CODE&gt;engines = engine_section&lt;/CODE&gt;.&lt;/LI&gt;
&lt;LI&gt;At the end of the file, add the following lines:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;[engine_section]&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;pkcs11 = pkcs11_section&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;[pkcs11_section]&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;engine_id = pkcs11&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;dynamic_path = /usr/lib/engines-3/pkcs11.so&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;MODULE_PATH = /usr/lib/libpkcs-hse.so.1&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;init=0&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Test the PKCS11 engine. If everything is set up correctly, you should observe a similar log as provided.&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Celeste_Liu_4-1726126417446.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/298788iACF7E5DBD0B2C430/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Celeste_Liu_4-1726126417446.png" alt="Celeste_Liu_4-1726126417446.png" /&gt;&lt;/span&gt;&lt;/LI&gt;
&lt;LI&gt;To use a hash algorithm:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;Generate a plain text file for testing by typing:
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;cd ~/workspace&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;CODE&gt;echo "1111" &amp;gt; plain.txt&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Calculate the hash value by typing and You can see the following log::
&lt;UL class="auto-hide-last-sibling-br"&gt;
&lt;LI&gt;&lt;CODE&gt;openssl dgst -engine pkcs11 -keyform engine -sha512 plain.txt&lt;/CODE&gt;&lt;CODE&gt;&lt;/CODE&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/OL&gt;
&lt;P class="lia-indent-padding-left-90px"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Celeste_Liu_3-1726125485052.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/298781i6ACF775FD016AB08/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Celeste_Liu_3-1726125485052.png" alt="Celeste_Liu_3-1726125485052.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;DIV class="auto-hide-last-sibling-br paragraph-u1TS5p paragraph-element br-paragraph-space"&gt;This is only an example of S32GRDB2 + HSE + SHA512. If you want to know more about accessing the HSE via the PKCS11, refer to AN14072. Note that it is based on bsp38.&lt;BR /&gt;If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/DIV&gt;
&lt;DIV class="auto-hide-last-sibling-br paragraph-u1TS5p paragraph-element br-paragraph-space"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV class="auto-hide-last-sibling-br paragraph-u1TS5p paragraph-element br-paragraph-space"&gt;Best regards,&lt;/DIV&gt;
&lt;DIV class="auto-hide-last-sibling-br paragraph-u1TS5p paragraph-element br-paragraph-space"&gt;Celeste&lt;/DIV&gt;</description>
      <pubDate>Thu, 12 Sep 2024 07:43:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953221#M10775</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2024-09-12T07:43:23Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953433#M10778</link>
      <description>&lt;P&gt;i want to integrate the af_alg engine with thekernel crypto apis. Could u please tell me what are the kernel crypto apis and what is the entire flow as per diagram shown.&lt;BR /&gt;Thank you&lt;/P&gt;</description>
      <pubDate>Thu, 12 Sep 2024 11:29:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953433#M10778</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-12T11:29:01Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953913#M10782</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/234952"&gt;@ashwini2024&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;This question is rather broad, so we may not be able to answer it directly. We apologize for the inconvenience. Could you please refine your specific needs? For example, which specific algorithm or function do you require?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Fri, 13 Sep 2024 03:59:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1953913#M10782</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2024-09-13T03:59:31Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1955041#M10792</link>
      <description>&lt;P&gt;In the yocto package there is algif_hash.c which contains the apis now i have to integrate it with a user space application how can i do it to perform hashing&lt;/P&gt;</description>
      <pubDate>Mon, 16 Sep 2024 08:09:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1955041#M10792</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-09-16T08:09:52Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1957056#M10822</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/234952"&gt;@ashwini2024&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Sorry for the late reply. The past few days were holidays. Regarding the content you mentioned above, I believe I have already provided very detailed steps in my previous answer. Do you still have any problems in operation? Additionally, I noticed that you have created a new thread in the community: &lt;A href="https://community.nxp.com/t5/S32G/HSE-integration/td-p/1955419" target="_blank"&gt;HSE integration - NXP Community&lt;/A&gt;. My colleague is also assisting you. For the convenience of thread management, may I close this thread?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Thu, 19 Sep 2024 01:52:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1957056#M10822</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2024-09-19T01:52:16Z</dc:date>
    </item>
    <item>
      <title>Re: Enabling cryptographic on A core</title>
      <link>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1975698#M11289</link>
      <description>&lt;P&gt;I have shifted to bsp 40&lt;BR /&gt;Could you please let me know how could i perform hashing and any other cryptographic operations ?&lt;BR /&gt;Should i still follow the steps you mentioned i have enabled the hse firmware and also the hse device. THe output is as below .How do i move further ?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ashwini2024_0-1729141111556.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/305169i4959D1B300F53509/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ashwini2024_0-1729141111556.png" alt="ashwini2024_0-1729141111556.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Oct 2024 04:58:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/Enabling-cryptographic-on-A-core/m-p/1975698#M11289</guid>
      <dc:creator>ashwini2024</dc:creator>
      <dc:date>2024-10-17T04:58:42Z</dc:date>
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