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    <title>S32GのトピックS32G2 UART1 support in LinuxBSP29_HF1</title>
    <link>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1485400#M1015</link>
    <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;On our custom board and on S32G2_RDB2 I am trying to communicate over UART1 but there is no data transmit and receive happening.&lt;/P&gt;&lt;P&gt;I am working with Linux BSP:BSP29.0_HF1&lt;/P&gt;&lt;P&gt;UART pins used on both hardware is same i.e.:&lt;/P&gt;&lt;P&gt;UART_TX: U12 (PA_13)&lt;/P&gt;&lt;P&gt;UART_RX: W12 (PB_00)&lt;/P&gt;&lt;P&gt;In file: arch/arm64/boot/dts/freescale/fsl-s32-gen1.dtsi&lt;/P&gt;&lt;P&gt;Below configuration looks fine:&lt;/P&gt;&lt;P&gt;uart1:serial@401CC000 {&lt;BR /&gt;compatible = "fsl,s32-linflexuart";&lt;BR /&gt;reg = &amp;lt;0x0 0x401CC000 0x0 0x3000&amp;gt;;&lt;BR /&gt;interrupts = &amp;lt;0 83 1&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_LINFLEX_LIN&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_LINFLEX_XBAR&amp;gt;;&lt;BR /&gt;clock-names = "lin", "ipg";&lt;BR /&gt;dmas = &amp;lt;&amp;amp;edma0 0 6&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;edma0 0 5&amp;gt;;&lt;BR /&gt;dma-names = "rx", "tx";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;On both custom and RDB2 I can see node: /dev/ttyLF1 but there is no communication.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you confirm if anything is missing in software or hardware.&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Vivek&lt;/P&gt;</description>
    <pubDate>Wed, 06 Jul 2022 12:01:40 GMT</pubDate>
    <dc:creator>vivek_kaushik</dc:creator>
    <dc:date>2022-07-06T12:01:40Z</dc:date>
    <item>
      <title>S32G2 UART1 support in LinuxBSP29_HF1</title>
      <link>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1485400#M1015</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;On our custom board and on S32G2_RDB2 I am trying to communicate over UART1 but there is no data transmit and receive happening.&lt;/P&gt;&lt;P&gt;I am working with Linux BSP:BSP29.0_HF1&lt;/P&gt;&lt;P&gt;UART pins used on both hardware is same i.e.:&lt;/P&gt;&lt;P&gt;UART_TX: U12 (PA_13)&lt;/P&gt;&lt;P&gt;UART_RX: W12 (PB_00)&lt;/P&gt;&lt;P&gt;In file: arch/arm64/boot/dts/freescale/fsl-s32-gen1.dtsi&lt;/P&gt;&lt;P&gt;Below configuration looks fine:&lt;/P&gt;&lt;P&gt;uart1:serial@401CC000 {&lt;BR /&gt;compatible = "fsl,s32-linflexuart";&lt;BR /&gt;reg = &amp;lt;0x0 0x401CC000 0x0 0x3000&amp;gt;;&lt;BR /&gt;interrupts = &amp;lt;0 83 1&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_LINFLEX_LIN&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clks S32GEN1_SCMI_CLK_LINFLEX_XBAR&amp;gt;;&lt;BR /&gt;clock-names = "lin", "ipg";&lt;BR /&gt;dmas = &amp;lt;&amp;amp;edma0 0 6&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;edma0 0 5&amp;gt;;&lt;BR /&gt;dma-names = "rx", "tx";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;On both custom and RDB2 I can see node: /dev/ttyLF1 but there is no communication.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you confirm if anything is missing in software or hardware.&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Vivek&lt;/P&gt;</description>
      <pubDate>Wed, 06 Jul 2022 12:01:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1485400#M1015</guid>
      <dc:creator>vivek_kaushik</dc:creator>
      <dc:date>2022-07-06T12:01:40Z</dc:date>
    </item>
    <item>
      <title>Re: S32G2 UART1 support in LinuxBSP29_HF1</title>
      <link>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1494853#M1067</link>
      <description>&lt;P&gt;Hello Vivek,&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I have experienced this problem in RDB. The default setting of BSP29.0.0 does not configure Uart1 Multiplex pin, So you&amp;nbsp;probably need to configure the right Multiplex pin of Uart1.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;For example, RDB Uart2 pin is PB_00 and PA_13. You need to set MSCR13(address:0x4009c274) value as 0x00214002. And&amp;nbsp;&amp;nbsp;set MSCR16(address:0x4009c280) value as 0x00094000, set IMCR224(address:0x44010dc0) as 0x00000002.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;By the way, A simple way to open Uart1 though configure u-boot. Just&amp;nbsp;modify&amp;nbsp;u-boot configuration file.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;file path:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;~/fsl-auto-yocto-bsp-29/build_s32g274ardb/tmp/work/s32g274ardb-fsl-linux/u-boot-s32/2020.04-r0/git/board/freescale/s32-gen1/ s32g274ardb.c&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV id="tinyMceEditornxf65386_0" class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV id="tinyMceEditornxf65386_1" class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;Change to the following picture:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Bio_TICFSL_0-1658755959905.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187715i319668D1BD7D5158/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Bio_TICFSL_0-1658755959905.png" alt="Bio_TICFSL_0-1658755959905.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Both uart1 and uart2 will open.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jul 2022 13:34:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1494853#M1067</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2022-07-25T13:34:05Z</dc:date>
    </item>
    <item>
      <title>Re: S32G2 UART1 support in LinuxBSP29_HF1</title>
      <link>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1494884#M1072</link>
      <description>&lt;P&gt;Hello Bio_TICFSL,&lt;/P&gt;&lt;P&gt;Thanks! for the inputs. Will enable UART1 in U-Boot and check.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Vivek&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jul 2022 14:14:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1494884#M1072</guid>
      <dc:creator>vivek_kaushik</dc:creator>
      <dc:date>2022-07-25T14:14:57Z</dc:date>
    </item>
    <item>
      <title>Re: S32G2 UART1 support in LinuxBSP29_HF1</title>
      <link>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1495374#M1074</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;SPAN&gt;Bio_TICFSL,&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Do you have any input:&lt;/P&gt;&lt;P&gt;1. How perticular ttyLFx interface is getting linked to the specific pinmux pads and enabled.&lt;/P&gt;&lt;P&gt;2. I see in the u-boot only ttyLF0 is getting enabled based on &amp;lt;CONFIG_FSL_LINFLEX_MODULE=0&amp;gt; in &amp;lt;.config&amp;gt;, I am sure from where it is getting initialized with 0.&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Vivek&lt;/P&gt;</description>
      <pubDate>Tue, 26 Jul 2022 07:45:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32G/S32G2-UART1-support-in-LinuxBSP29-HF1/m-p/1495374#M1074</guid>
      <dc:creator>vivek_kaushik</dc:creator>
      <dc:date>2022-07-26T07:45:47Z</dc:date>
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