<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Diagnostics in MC33HB2000 series in Power Management</title>
    <link>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2411897#M5394</link>
    <description>Thanks for the prompt reply, so if I understand it correct if I perform bit wise AND operation of fault status register with appropriate number and store it in the mask status register, I will be able to ignore few faults?</description>
    <pubDate>Tue, 08 Sep 2026 08:56:29 GMT</pubDate>
    <dc:creator>adityavardhan</dc:creator>
    <dc:date>2026-09-08T08:56:29Z</dc:date>
    <item>
      <title>Diagnostics in MC33HB2000 series</title>
      <link>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2410798#M5392</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;I have few queries regarding the diagnostics in MC33HB200 series,&lt;BR /&gt;&lt;BR /&gt;1. If a fault is triggered the fault status bit is flagged, which is read my the MCU and then the fault status register is read to confirm which fault it is. Is the understanding correct?&lt;BR /&gt;2. What is the difference b/w fault status register and fault status mask register and where it is used ?&lt;BR /&gt;&lt;BR /&gt;Regards&lt;BR /&gt;Aditya Vardhan&lt;/P&gt;</description>
      <pubDate>Thu, 03 Sep 2026 05:17:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2410798#M5392</guid>
      <dc:creator>adityavardhan</dc:creator>
      <dc:date>2026-09-03T05:17:27Z</dc:date>
    </item>
    <item>
      <title>Re: Diagnostics in MC33HB2000 series</title>
      <link>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2410831#M5393</link>
      <description>&lt;P&gt;Hi &lt;SPAN&gt;Aditya Vardhan&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;You are correct!&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The Status / Fault Status register tells you what fault actually happened; the Fault Status Mask register only decides which of those faults will be reported on the FS_B pin&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 03 Sep 2026 06:54:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2410831#M5393</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2026-09-03T06:54:36Z</dc:date>
    </item>
    <item>
      <title>Re: Diagnostics in MC33HB2000 series</title>
      <link>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2411897#M5394</link>
      <description>Thanks for the prompt reply, so if I understand it correct if I perform bit wise AND operation of fault status register with appropriate number and store it in the mask status register, I will be able to ignore few faults?</description>
      <pubDate>Tue, 08 Sep 2026 08:56:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/Diagnostics-in-MC33HB2000-series/m-p/2411897#M5394</guid>
      <dc:creator>adityavardhan</dc:creator>
      <dc:date>2026-09-08T08:56:29Z</dc:date>
    </item>
  </channel>
</rss>

