https://community.nxp.com/t5/Power-Management/PPF0900AMBA1ES/m-p/2403022#M5330 <P>Hi NXP team,</P><P>I'm working on a custom board based on the i.MX95 (MIMX9596, 19x19 package, LPDDR5), using the PPF0900AMBA1ES PMIC.</P><P>Could you please confirm:</P><P>1.Does this part number ship with OTP already programmed, or is it a non-programmed engineering sample?<BR />2.If it is non-programmed, what is the recommended procedure to program (or emulate) the OTP configuration for bring-up and evaluation purposes?<BR />3.Is a reference OTP configuration file (.CFG) available for an i.MX95 + LPDDR5 (19x19) implementation that we could use as a starting point?<BR />For context, our schematic closely follows the i.MX95 EVK reference design (PF09 + PF5301 + PF5302), and we're currently doing initial power-on bring-up.</P><P>Thank you.</P> Sat, 08 Aug 2026 04:58:23 GMT maheshtankala 2026-08-08T04:58:23Z https://community.nxp.com/t5/Power-Management/PPF0900AMBA1ES/m-p/2403022#M5330 <P>Hi NXP team,</P><P>I'm working on a custom board based on the i.MX95 (MIMX9596, 19x19 package, LPDDR5), using the PPF0900AMBA1ES PMIC.</P><P>Could you please confirm:</P><P>1.Does this part number ship with OTP already programmed, or is it a non-programmed engineering sample?<BR />2.If it is non-programmed, what is the recommended procedure to program (or emulate) the OTP configuration for bring-up and evaluation purposes?<BR />3.Is a reference OTP configuration file (.CFG) available for an i.MX95 + LPDDR5 (19x19) implementation that we could use as a starting point?<BR />For context, our schematic closely follows the i.MX95 EVK reference design (PF09 + PF5301 + PF5302), and we're currently doing initial power-on bring-up.</P><P>Thank you.</P> Sat, 08 Aug 2026 04:58:23 GMT https://community.nxp.com/t5/Power-Management/PPF0900AMBA1ES/m-p/2403022#M5330 maheshtankala 2026-08-08T04:58:23Z