https://community.nxp.com/t5/Power-Management/PMIC-Safety-Configuration-by-MCU/m-p/2401222#M5320 <P>You can refer to below picture showed:</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_0-1785720521280.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/393582i60B7188BD1F296DB/image-size/medium?v=v2&amp;px=400" role="button" title="guoweisun_0-1785720521280.png" alt="guoweisun_0-1785720521280.png" /><span class="lia-inline-image-caption" onclick="event.preventDefault();">guoweisun_0-1785720521280.png</span></span></P> <P>ABIST can check VANA VDIG automatically not need configure.</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_1-1785720570149.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/393583i45AC7BFED6E4CC11/image-size/medium?v=v2&amp;px=400" role="button" title="guoweisun_1-1785720570149.png" alt="guoweisun_1-1785720570149.png" /><span class="lia-inline-image-caption" onclick="event.preventDefault();">guoweisun_1-1785720570149.png</span></span></P> <P>&nbsp;</P> <P>&nbsp;</P> Mon, 03 Aug 2026 01:30:24 GMT guoweisun 2026-08-03T01:30:24Z https://community.nxp.com/t5/Power-Management/PMIC-Safety-Configuration-by-MCU/m-p/2399711#M5319 <P class=""><SPAN>Hello NXP,</SPAN></P><P class=""><SPAN>From the FS26 Safety Manual, we understand that the fault reactions for the output regulators can be configured by the MCU during initialization.</SPAN></P><P class=""><SPAN>Could you please clarify whether this configuration requirement applies </SPAN><STRONG><SPAN>only to the output regulator fault reactions</SPAN></STRONG><SPAN>, (RSTB , FS0B &amp; 01) of&nbsp;<BR />PS_BUCK_PRE</SPAN></P><P class=""><SPAN>PS_CORE<BR />PS_LDO1<BR />PS_LDO2<BR />PS_LDO_REF<BR />PS_TRK1<BR />PS_TRK2<BR /><BR /><BR />or whether the fault reactions for the </SPAN><STRONG><SPAN>internal voltage monitoring functions</SPAN></STRONG><SPAN> (e.g., </SPAN><STRONG><SPAN>VANA, VDIG</SPAN></STRONG><SPAN>, and other internally monitored supply rails) also need to be configured by the MCU during initialization?</SPAN></P><P><SPAN>If the internal voltage monitoring fault reactions are not configurable by the MCU, can we assume that these reactions are fully managed internally by the FS26 PMIC?</SPAN></P><P>&nbsp;</P><P><SPAN>can you list which fault reaction does not required to be configured by the MCU and which requires&nbsp;</SPAN></P><P>&nbsp;</P><P>&nbsp;</P> Tue, 28 Jul 2026 17:11:00 GMT https://community.nxp.com/t5/Power-Management/PMIC-Safety-Configuration-by-MCU/m-p/2399711#M5319 Sandee_pinninti22 2026-07-28T17:11:00Z https://community.nxp.com/t5/Power-Management/PMIC-Safety-Configuration-by-MCU/m-p/2401222#M5320 <P>You can refer to below picture showed:</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_0-1785720521280.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/393582i60B7188BD1F296DB/image-size/medium?v=v2&amp;px=400" role="button" title="guoweisun_0-1785720521280.png" alt="guoweisun_0-1785720521280.png" /><span class="lia-inline-image-caption" onclick="event.preventDefault();">guoweisun_0-1785720521280.png</span></span></P> <P>ABIST can check VANA VDIG automatically not need configure.</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_1-1785720570149.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/393583i45AC7BFED6E4CC11/image-size/medium?v=v2&amp;px=400" role="button" title="guoweisun_1-1785720570149.png" alt="guoweisun_1-1785720570149.png" /><span class="lia-inline-image-caption" onclick="event.preventDefault();">guoweisun_1-1785720570149.png</span></span></P> <P>&nbsp;</P> <P>&nbsp;</P> Mon, 03 Aug 2026 01:30:24 GMT https://community.nxp.com/t5/Power-Management/PMIC-Safety-Configuration-by-MCU/m-p/2401222#M5320 guoweisun 2026-08-03T01:30:24Z