TPL+33664+33774

zqing — Fri, 10 Jul 2026 03:55:34 GMT

I have been working on a BMS project recently and encountered the following issues.

The publicly available MC33664 datasheet downloaded from NXP’s official website does not contain any register descriptions for the MC33664 transceiver. In addition, the official demo code package I downloaded also lacks any routines for accessing and operating MC33664 internal registers.

Does TPL3 communication require read/write access to MC33664’s registers?

If register operations are mandatory, could anyone share a complete MC33664 datasheet with full register specifications, as well as a sample demo project that implements MC33664 register read/write logic? Many thanks!

Re: TPL+33664+33774

TomasVaverka — Fri, 10 Jul 2026 07:04:11 GMT

Hi,

The datasheet you have downloaded is already the complete, full document. The MC33664 does not contain any internal registers and therefore does not require register read/write operations for TPL communication.

The device acts as a transparent TPL physical-layer transceiver. It converts the MCU SPI transmit stream into TPL pulse-encoded signals and converts received TPL traffic back into SPI signals. As a result, communication with devices on the TPL network is performed by sending and receiving TPL frames through the SPI interface.

You may be referring to the newer MC33665A gateway device, which does include internal registers, message queues, routing functions and a register-access protocol. The MC33665A full datasheet (available as a Secure file under NDA) therefore contains extensive register descriptions.

We have SW device drivers available for both the MC33664 and MC33665 as part of the Gen1 SDK. As for the MC33664, the CDD layer on the MCU handles tasks such as pin timing to execute a wake-up sequence, configuring and managing two independent SPI blocks on the MCU simultaneously, interrupt routing etc.

BRs, Tomas

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TPL+33664+33774

Re: TPL+33664+33774