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    <title>topic When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324, J-Li in Power Management</title>
    <link>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2184912#M4737</link>
    <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_0-1760361983680.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360487i34B57C056B2C2E7D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_0-1760361983680.png" alt="mgdsun2000_0-1760361983680.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_0-1760361983680.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The schematic diagram of the external Bipolar Junction Transistor (BJT) used between VDD_HV_A and V15 is shown in the figure above.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;According to the above schematic diagram, when the LMBCTLEN field in the ConfigRegister is set to 1, &lt;FONT face="arial black,avant garde"&gt;J-Link becomes unable to read register values after the code execution reaches the part marked with a circle in the figure below.&lt;/FONT&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_1-1760362038037.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360488iF70E3804244D9FA7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_1-1760362038037.png" alt="mgdsun2000_1-1760362038037.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_1-1760362038037.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The status of registers of S32K324 read by J-Link is shown in the figure below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_2-1760362590904.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360490i0A43EFB216216F72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_2-1760362590904.png" alt="mgdsun2000_2-1760362590904.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_2-1760362590904.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please tell me the cause of the above-mentioned problem and how to solve it?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 13 Oct 2025 13:44:47 GMT</pubDate>
    <dc:creator>mgdsun2000</dc:creator>
    <dc:date>2025-10-13T13:44:47Z</dc:date>
    <item>
      <title>When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324, J-Li</title>
      <link>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2184912#M4737</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_0-1760361983680.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360487i34B57C056B2C2E7D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_0-1760361983680.png" alt="mgdsun2000_0-1760361983680.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_0-1760361983680.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The schematic diagram of the external Bipolar Junction Transistor (BJT) used between VDD_HV_A and V15 is shown in the figure above.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;According to the above schematic diagram, when the LMBCTLEN field in the ConfigRegister is set to 1, &lt;FONT face="arial black,avant garde"&gt;J-Link becomes unable to read register values after the code execution reaches the part marked with a circle in the figure below.&lt;/FONT&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_1-1760362038037.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360488iF70E3804244D9FA7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_1-1760362038037.png" alt="mgdsun2000_1-1760362038037.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_1-1760362038037.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The status of registers of S32K324 read by J-Link is shown in the figure below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mgdsun2000_2-1760362590904.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360490i0A43EFB216216F72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mgdsun2000_2-1760362590904.png" alt="mgdsun2000_2-1760362590904.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;mgdsun2000_2-1760362590904.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please tell me the cause of the above-mentioned problem and how to solve it?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Oct 2025 13:44:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2184912#M4737</guid>
      <dc:creator>mgdsun2000</dc:creator>
      <dc:date>2025-10-13T13:44:47Z</dc:date>
    </item>
    <item>
      <title>回复： When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324,</title>
      <link>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2184914#M4738</link>
      <description>&lt;P&gt;&lt;SPAN&gt;When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324, J-Link loses the ability to emulate the chip once the LMBCTLEN field is set to 1.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Oct 2025 13:46:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2184914#M4738</guid>
      <dc:creator>mgdsun2000</dc:creator>
      <dc:date>2025-10-13T13:46:29Z</dc:date>
    </item>
    <item>
      <title>Re: When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324,</title>
      <link>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2186039#M4739</link>
      <description>&lt;P&gt;Hello mgdsun2000&lt;/P&gt;
&lt;P&gt;Good day!&lt;/P&gt;
&lt;P&gt;Okay, let's do some tests to see what options we have.&lt;/P&gt;
&lt;P&gt;Avoid setting LMBCTLEN = 1 during development/debug sessions. This keeps V15 powered and maintains J-Link access.&lt;/P&gt;
&lt;P&gt;If LMBCTLEN must be enabled for production or power-saving reasons&lt;/P&gt;
&lt;P&gt;Add a delay or conditional check to activate it only after all debug operations are complete.&lt;/P&gt;
&lt;P&gt;Ensure V15 remains powered even when LMB is disabled&lt;/P&gt;
&lt;P&gt;If available, switch to a debug interface that doesn't rely on V15&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I hope this information has helped you, please let me know if you need help with anything else.&lt;/P&gt;
&lt;P&gt;Have a great day and best of luck.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Oct 2025 20:53:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2186039#M4739</guid>
      <dc:creator>RafaR</dc:creator>
      <dc:date>2025-10-14T20:53:09Z</dc:date>
    </item>
    <item>
      <title>Re: When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324,</title>
      <link>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2186617#M4742</link>
      <description>Thank you very much for your explanations.&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; “Avoid setting LMBCTLEN = 1 during development/debug sessions. This keeps V15 powered and maintains J-Link access.”&amp;nbsp; &amp;nbsp; According to your reply, does using an external V15 mean that the debug interface cannot be used? Logically, when LMBCTLEN is set to 1, V15 should remain powered, just switching from internal to external V15. Then why does the J-Link debugging disconnect?&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Additionally, I haven't found more detailed information about the specific power supply domains of the internal power supply modules in the S32K324 chip, and I'm not sure which power domain the debug interface belongs to. Could you provide more specific materials?&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;Furthermore, when I debug the S32K324, I first debug the M7_0 core. When LMBCTLEN = 1, the J-Link disconnects, but I can attach the J-Link (SWD) to the M7_1 core normally for debugging. Why does the debugging of the M7_0 core get disconnected?</description>
      <pubDate>Wed, 15 Oct 2025 12:18:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/When-an-external-Bipolar-Junction-Transistor-BJT-is-used-between/m-p/2186617#M4742</guid>
      <dc:creator>mgdsun2000</dc:creator>
      <dc:date>2025-10-15T12:18:36Z</dc:date>
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