https://community.nxp.com/t5/Power-Management/PF82-Communication/m-p/2110627#M4395 <P>Tabii Mehmet, işte sorunu NXP Community forumunda İngilizce olarak sorabileceğin bir şekilde yazıyorum:</P><HR /><P><STRONG>Question:</STRONG><BR />Hi,<BR />I’m using an S32K MCU connected via I2C to a PF8201 PMIC. In my system, the PF8201 is powered by a separate PMIC (FS56), so the VDDIO rail is always supplied properly. However, if the PF8201 enters fail-safe state (due to a critical fault like PU_FAIL or BIST error), will the I2C interface still be accessible to read the FAIL bits (e.g., PU_FAIL, WD_FAIL, REG_FAIL, TSD_FAIL)? Or does the PF8201’s state machine disable I2C register access entirely in fail-safe state?&nbsp;</P><P>Can I still read registers like FAIL bits during the fail-safe state in this configuration? Or is I2C fully disabled once the device enters fail-safe?</P><P>Thank you in advance</P> Wed, 04 Jun 2025 18:25:10 GMT mehmetkaradag 2025-06-04T18:25:10Z https://community.nxp.com/t5/Power-Management/PF82-Communication/m-p/2110627#M4395 <P>Tabii Mehmet, işte sorunu NXP Community forumunda İngilizce olarak sorabileceğin bir şekilde yazıyorum:</P><HR /><P><STRONG>Question:</STRONG><BR />Hi,<BR />I’m using an S32K MCU connected via I2C to a PF8201 PMIC. In my system, the PF8201 is powered by a separate PMIC (FS56), so the VDDIO rail is always supplied properly. However, if the PF8201 enters fail-safe state (due to a critical fault like PU_FAIL or BIST error), will the I2C interface still be accessible to read the FAIL bits (e.g., PU_FAIL, WD_FAIL, REG_FAIL, TSD_FAIL)? Or does the PF8201’s state machine disable I2C register access entirely in fail-safe state?&nbsp;</P><P>Can I still read registers like FAIL bits during the fail-safe state in this configuration? Or is I2C fully disabled once the device enters fail-safe?</P><P>Thank you in advance</P> Wed, 04 Jun 2025 18:25:10 GMT https://community.nxp.com/t5/Power-Management/PF82-Communication/m-p/2110627#M4395 mehmetkaradag 2025-06-04T18:25:10Z https://community.nxp.com/t5/Power-Management/PF82-Communication/m-p/2111115#M4396 <P>Hi Mehmet,</P> <P>please refer to the section 13.1.9 in the <A href="https://www.nxp.com/docs/en/data-sheet/PF8101_PF8201.pdf" target="_self">PF8101_PF8201 datasheet</A>. The FAIL bits can be read only in System-on state, which are only RUN and Standby state. So these bits cannot be read in Fail-Safe state.&nbsp;</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="JozefKozon_0-1749111071535.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/341566i13F8998AD64A7AD9/image-size/medium?v=v2&amp;px=400" role="button" title="JozefKozon_0-1749111071535.png" alt="JozefKozon_0-1749111071535.png" /></span></P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="JozefKozon_1-1749111105027.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/341567i782E12C26087A58D/image-size/medium?v=v2&amp;px=400" role="button" title="JozefKozon_1-1749111105027.png" alt="JozefKozon_1-1749111105027.png" /></span><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="JozefKozon_2-1749111137646.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/341569i8921F0120923BE17/image-size/medium?v=v2&amp;px=400" role="button" title="JozefKozon_2-1749111137646.png" alt="JozefKozon_2-1749111137646.png" /></span></P> <P>With Best Regards,</P> <P>Jozef</P> <P>&nbsp;</P> Thu, 05 Jun 2025 08:27:58 GMT https://community.nxp.com/t5/Power-Management/PF82-Communication/m-p/2111115#M4396 JozefKozon 2025-06-05T08:27:58Z