<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: MC33FS8530A0-ES OTP CONFIGURATION in Power Management</title>
    <link>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1745633#M3041</link>
    <description>Thank you guoweisn for the valuable information.</description>
    <pubDate>Wed, 25 Oct 2023 05:43:35 GMT</pubDate>
    <dc:creator>Bhavay</dc:creator>
    <dc:date>2023-10-25T05:43:35Z</dc:date>
    <item>
      <title>MC33FS8530A0-ES OTP CONFIGURATION</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1735466#M2996</link>
      <description>&lt;P&gt;&lt;SPAN class=""&gt;Hello NXP Community,&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I'm working on the PMIC OTP, MC33FS8530A0-ES. I came across these questions. Please help me with these.....&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Q1.&amp;nbsp;How do I determine the appropriate power sequencing and delay values for my PMIC ?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Q2.&amp;nbsp;What are the key factors&amp;nbsp;&amp;nbsp;that determine the power sequencing and delay values for my specific NXP PMIC ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Q3.&amp;nbsp;&amp;nbsp;What are the risks of not following the recommended power sequencing and delay values ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Q4.&amp;nbsp;&amp;nbsp;Can you please provide me with some general guidelines on how to set the power sequencing and delay values for my PMIC ?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Oct 2023 04:13:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1735466#M2996</guid>
      <dc:creator>Bhavay</dc:creator>
      <dc:date>2023-10-09T04:13:05Z</dc:date>
    </item>
    <item>
      <title>Re: MC33FS8530A0-ES OTP CONFIGURATION</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1735561#M2997</link>
      <description>&lt;P&gt;&lt;SPAN&gt;For your Q1-3,the power sequency and delay value is depend by your MCU requirement not the SBC side.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;SPAN&gt;Q4 you can download the OTP FS84 / FS85 OTP Configuration tool&amp;nbsp;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;for setting the delay and slot:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/sps/download/download.jsp" target="_blank"&gt;Download FS84 / FS85 OTP Configuration tool (nxp.com)&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Oct 2023 07:23:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1735561#M2997</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2023-10-09T07:23:39Z</dc:date>
    </item>
    <item>
      <title>Re: MC33FS8530A0-ES OTP CONFIGURATION</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1745633#M3041</link>
      <description>Thank you guoweisn for the valuable information.</description>
      <pubDate>Wed, 25 Oct 2023 05:43:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33FS8530A0-ES-OTP-CONFIGURATION/m-p/1745633#M3041</guid>
      <dc:creator>Bhavay</dc:creator>
      <dc:date>2023-10-25T05:43:35Z</dc:date>
    </item>
  </channel>
</rss>

