<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>Power ManagementのトピックRe: MC33771 S32K BALANCING</title>
    <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853477#M202</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Thomas,&lt;/P&gt;&lt;P&gt;I have used the function and checked the status DRV_STATUS and&amp;nbsp;CBx_CFG to confirm if the cells are balancing.&lt;/P&gt;&lt;P&gt;&amp;nbsp;I have enabled the function in monitoring.c file as&amp;nbsp;BCC_SetCBIndividually(bccDrvConfig, 1, 9 or 14 (*tried two examples*), true); .&lt;/P&gt;&lt;P&gt;My question is : &lt;STRONG&gt;When only one cell balancing is enabled,I see all other cells also dissipating along with it&lt;/STRONG&gt;. Why is it so?&lt;/P&gt;&lt;P&gt;----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | &lt;STRONG&gt;drv_status&lt;/STRONG&gt; | 0x2000 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0x8716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | CB10 CFG | 0x00FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | &lt;STRONG&gt;CB14 CFG&lt;/STRONG&gt; | 0x02FF |&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp;.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;RESULTS : (when balancing of 14th cell was enabled)&lt;/P&gt;&lt;P&gt;3255 3240 3212 3232 3308 3279 3065 3096 3366 3383 3367 3208 3360 3350 - INITIAL&amp;nbsp;&lt;BR /&gt; 3246 3232 3199 3221 3299 3269 3047 3077 3363 3378 3363 3198 3357 3331 - FINAL&amp;nbsp;&lt;BR /&gt;9 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;8&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;13&amp;nbsp; &amp;nbsp; &amp;nbsp; 11&amp;nbsp; &amp;nbsp; &amp;nbsp; 9 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10 &amp;nbsp;&amp;nbsp;&amp;nbsp;18 &amp;nbsp;&amp;nbsp;&amp;nbsp;19 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;3 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;5 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;4 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;3 &amp;nbsp;&amp;nbsp;&amp;nbsp;19&amp;nbsp; _difference in voltages&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp; ----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | &lt;STRONG&gt;drv_status&lt;/STRONG&gt; | 0x0200 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0x7716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | &lt;STRONG&gt;CB10 CFG&lt;/STRONG&gt; | 0x02FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | CB14 CFG | 0x00FF |.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;RESULTS : (when balancing of 10th cell was enabled)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt; 3241 3224 3190 3213 3295 3263 3024 3059 3357 3363 3358 3187 3351 3324- INITIAL&amp;nbsp;&lt;BR /&gt; 3223 3203 3168 3191 3279 3247 2976 3019 3346 3327 3348 3163 3341 3314&amp;nbsp;- FINAL&amp;nbsp;&lt;BR /&gt;18 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;21 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;22 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;22 &amp;nbsp;&amp;nbsp;&amp;nbsp;16 &amp;nbsp;&amp;nbsp;&amp;nbsp;16 &amp;nbsp;&amp;nbsp;&amp;nbsp;48 &amp;nbsp;&amp;nbsp;&amp;nbsp;40&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 11&amp;nbsp;&amp;nbsp;&amp;nbsp; 36 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 24 &amp;nbsp;&amp;nbsp;&amp;nbsp;10&amp;nbsp;&amp;nbsp;&amp;nbsp; 10&amp;nbsp;_difference in voltages&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 06 Mar 2019 07:00:07 GMT</pubDate>
    <dc:creator>sushma</dc:creator>
    <dc:date>2019-03-06T07:00:07Z</dc:date>
    <item>
      <title>MC33771 S32K BALANCING</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853475#M200</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;The following observation was made when the balancing was enabled, although balancing of one cell is activated, other cells also seem to discharge; two approaches were followed :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) BCC_SetCBIndividually(bccDrvConfig, 1, 13, true); - balances the 14 cell&lt;BR /&gt; Results : 3391 3391 3374 3384 3415 3405 3314 3322 3428 3429 3430 3390 3431 3431&lt;/P&gt;&lt;P&gt;3378 3376 3360 3370 3406 3396 3297 3307 3423 3424 3423 3374 3427 3421&lt;BR /&gt;But other than the 14th cell, even other cell seems to be dissipated.&lt;/P&gt;&lt;P&gt;Register values : &lt;BR /&gt; ----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | drv_status | 0x0001 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0xA716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | CB10 CFG | 0x00FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | CB14 CFG | 0x02FF |&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2) BCC_SetCBIndividually(bccDrvConfig, 1, 0, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 1, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 2, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 3, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 4, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 5, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 6, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 7, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 8, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 9, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 10, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 11, false);&lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 12, false); &lt;BR /&gt; BCC_SetCBIndividually(bccDrvConfig, 1, 13, true);&lt;BR /&gt; Only the 14th cell balancing was enabled, rest all were disabled.&lt;/P&gt;&lt;P&gt;Results : &lt;BR /&gt;3375 3374 3357 3367 3403 3392 3292 3302 3421 3425 3423 3372 3426 3420&lt;/P&gt;&lt;P&gt;3367 3367 3349 3360 3401 3389 3282 3291 3420 3425 3421 3361 3423 3414 &lt;BR /&gt;But other than the 14th cell, even other cell seems to be dissipated.&lt;/P&gt;&lt;P&gt;Register values : &lt;BR /&gt; ----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | drv_status | 0x0001 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0x5716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | CB10 CFG | 0x00FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | CB14 CFG | 0x02FF |&lt;/P&gt;&lt;P&gt;Kindly look into this issue and suggest a solution.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Feb 2019 06:12:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853475#M200</guid>
      <dc:creator>sushma</dc:creator>
      <dc:date>2019-02-27T06:12:26Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771 S32K BALANCING</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853476#M201</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sushma,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have performed some measurements on our EVB and it seems that the function BCC_SetCBIndividually is working properly. Which status does this function return in your case and what is the value of the&amp;nbsp;CB_DRV_STS register which shows the actual state of the cell balance drivers?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Tomas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Mar 2019 14:39:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853476#M201</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2019-03-01T14:39:50Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771 S32K BALANCING</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853477#M202</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Thomas,&lt;/P&gt;&lt;P&gt;I have used the function and checked the status DRV_STATUS and&amp;nbsp;CBx_CFG to confirm if the cells are balancing.&lt;/P&gt;&lt;P&gt;&amp;nbsp;I have enabled the function in monitoring.c file as&amp;nbsp;BCC_SetCBIndividually(bccDrvConfig, 1, 9 or 14 (*tried two examples*), true); .&lt;/P&gt;&lt;P&gt;My question is : &lt;STRONG&gt;When only one cell balancing is enabled,I see all other cells also dissipating along with it&lt;/STRONG&gt;. Why is it so?&lt;/P&gt;&lt;P&gt;----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | &lt;STRONG&gt;drv_status&lt;/STRONG&gt; | 0x2000 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0x8716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | CB10 CFG | 0x00FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | &lt;STRONG&gt;CB14 CFG&lt;/STRONG&gt; | 0x02FF |&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp;.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;RESULTS : (when balancing of 14th cell was enabled)&lt;/P&gt;&lt;P&gt;3255 3240 3212 3232 3308 3279 3065 3096 3366 3383 3367 3208 3360 3350 - INITIAL&amp;nbsp;&lt;BR /&gt; 3246 3232 3199 3221 3299 3269 3047 3077 3363 3378 3363 3198 3357 3331 - FINAL&amp;nbsp;&lt;BR /&gt;9 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;8&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;13&amp;nbsp; &amp;nbsp; &amp;nbsp; 11&amp;nbsp; &amp;nbsp; &amp;nbsp; 9 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10 &amp;nbsp;&amp;nbsp;&amp;nbsp;18 &amp;nbsp;&amp;nbsp;&amp;nbsp;19 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;3 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;5 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;4 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;3 &amp;nbsp;&amp;nbsp;&amp;nbsp;19&amp;nbsp; _difference in voltages&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp; ----------------------------------&lt;BR /&gt; | Register | Value |&lt;BR /&gt; ----------------------------------&lt;BR /&gt; | &lt;STRONG&gt;drv_status&lt;/STRONG&gt; | 0x0200 |&lt;BR /&gt; | INIT | 0x0001 |&lt;BR /&gt; | SYS CFG1 | 0x5380 |&lt;BR /&gt; | SYS CFG2 | 0x0DA1 |&lt;BR /&gt; | SYS DIAG | 0x0000 |&lt;BR /&gt; | ADC CFG | 0x7716 |&lt;BR /&gt; | ADC2 OFFSET COMP | 0x8000 |&lt;BR /&gt; | OV UV EN | 0xFFFF |&lt;BR /&gt; | CB1 CFG | 0x00FF |&lt;BR /&gt; | CB2 CFG | 0x00FF |&lt;BR /&gt; | CB3 CFG | 0x00FF |&lt;BR /&gt; | CB4 CFG | 0x00FF |&lt;BR /&gt; | CB5 CFG | 0x00FF |&lt;BR /&gt; | CB6 CFG | 0x00FF |&lt;BR /&gt; | CB7 CFG | 0x00FF |&lt;BR /&gt; | CB8 CFG | 0x00FF |&lt;BR /&gt; | CB9 CFG | 0x00FF |&lt;BR /&gt; | &lt;STRONG&gt;CB10 CFG&lt;/STRONG&gt; | 0x02FF |&lt;BR /&gt; | CB11 CFG | 0x00FF |&lt;BR /&gt; | CB12 CFG | 0x00FF |&lt;BR /&gt; | CB13 CFG | 0x00FF |&lt;BR /&gt; | CB14 CFG | 0x00FF |.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;RESULTS : (when balancing of 10th cell was enabled)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt; 3241 3224 3190 3213 3295 3263 3024 3059 3357 3363 3358 3187 3351 3324- INITIAL&amp;nbsp;&lt;BR /&gt; 3223 3203 3168 3191 3279 3247 2976 3019 3346 3327 3348 3163 3341 3314&amp;nbsp;- FINAL&amp;nbsp;&lt;BR /&gt;18 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;21 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;22 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;22 &amp;nbsp;&amp;nbsp;&amp;nbsp;16 &amp;nbsp;&amp;nbsp;&amp;nbsp;16 &amp;nbsp;&amp;nbsp;&amp;nbsp;48 &amp;nbsp;&amp;nbsp;&amp;nbsp;40&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 11&amp;nbsp;&amp;nbsp;&amp;nbsp; 36 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;10&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 24 &amp;nbsp;&amp;nbsp;&amp;nbsp;10&amp;nbsp;&amp;nbsp;&amp;nbsp; 10&amp;nbsp;_difference in voltages&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Mar 2019 07:00:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853477#M202</guid>
      <dc:creator>sushma</dc:creator>
      <dc:date>2019-03-06T07:00:07Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771 S32K BALANCING</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853478#M203</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Hi Sushma,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It does not seem to be a software issue, most likely it is a hardware problem. I have asked my colleagues to get some insight on this and will get back to you as soon as possible.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your patience.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Tomas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Mar 2019 11:33:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853478#M203</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2019-03-12T11:33:37Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771 S32K BALANCING</title>
      <link>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853479#M204</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Hi Sushma,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Could you please elaborate&amp;nbsp;on your hardware setup? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;What kind of cells/battery are you using and are you sure there is no load connected to the battery? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;What are the results when the balancing is disabled?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Tomas&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Mar 2019 11:17:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/MC33771-S32K-BALANCING/m-p/853479#M204</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2019-03-13T11:17:12Z</dc:date>
    </item>
  </channel>
</rss>

