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    <title>Power Management中的主题 Re: FS4500 SBC FS0b release not worked</title>
    <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852500#M195</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;VSNS_UV bit in the&amp;nbsp;DIAG_VSUP_VCAN register&amp;nbsp;is&amp;nbsp;an image of Vbat.&amp;nbsp;After a POR, VSNS crosses&amp;nbsp;VSNS_UV and consequently&amp;nbsp;&lt;SPAN&gt;VSNS_UV flag is set:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76630i566D140EF02C708D/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you correctly stated, reading&amp;nbsp;&lt;SPAN&gt;DIAG_VSUP_VCAN register (0x2000) is required after a POR to clear this flag. Are you sure you are reading this register correctly during the initialization phase?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SPI_REQ indicates an invalid SPI access:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76631i26E20E8999ED47EC/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_5.png" alt="pastedImage_5.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Tomas&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 10 Jan 2019 12:10:49 GMT</pubDate>
    <dc:creator>TomasVaverka</dc:creator>
    <dc:date>2019-01-10T12:10:49Z</dc:date>
    <item>
      <title>FS4500 SBC FS0b release not worked</title>
      <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852497#M192</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm not able to release FS0b pin.Its always low.&lt;/P&gt;&lt;P&gt;Please find the attached snapshots of register values and help me to identify the problem.&lt;/P&gt;&lt;P&gt;Note:In sbc init ,after first watchdog refresh watchdog was disable by selecting watchdog window as 0.&lt;/P&gt;&lt;P&gt;Errors Observed: VSNS_UV=1, FS0B_SNS=0, RSTB_EXT=1, FLT_ERR=6,SPI_REQ=1&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Jan 2019 07:27:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852497#M192</guid>
      <dc:creator>phanendravarma_</dc:creator>
      <dc:date>2019-01-04T07:27:13Z</dc:date>
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    <item>
      <title>Re: FS4500 SBC FS0b release not worked</title>
      <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852498#M193</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Watchdog disable (WD_WINDOW_3:0 = 0b0000) is effective only when the INIT_FS phase is closed, so it requires at least one good watchdog refresh (0x4D when using a default LFSR value of 0xB2) within the 256 ms of the INIT_FS timeout.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Tomas&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Jan 2019 09:23:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852498#M193</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2019-01-08T09:23:47Z</dc:date>
    </item>
    <item>
      <title>Re: FS4500 SBC FS0b release not worked</title>
      <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852499#M194</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tomas,Thanks for the reply&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now, I activated periodic watchdog refreshes and FS0b line is released.But still i encountered below errors in driver:&lt;/P&gt;&lt;P&gt;&lt;STRONG style="background-color: #ffffff; color: #51626f;"&gt;VSNS_UV=1,RSTB_EXT=1,&lt;SPAN style="background-color: #ffffff;"&gt;SPI_REQ=1&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Input to sbc is always 12v then why&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;VSNS_UV is set?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff;"&gt;In Init part of driver ,DIAG_VSUP_VCAN register is readed to clear it ,even though why VSNS_UV is set?.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff;"&gt;In which scenarios&amp;nbsp;&lt;STRONG style="color: #3d3d3d;"&gt;SPI_REQ &lt;/STRONG&gt;bit will be set?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff;"&gt;what is the meaning for&amp;nbsp;&lt;STRONG style="color: #3d3d3d;"&gt;RSTB_EXT&lt;/STRONG&gt;(External)&lt;STRONG style="color: #3d3d3d;"&gt;&amp;nbsp;&lt;/STRONG&gt;set?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;PVR&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Jan 2019 11:00:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852499#M194</guid>
      <dc:creator>phanendravarma_</dc:creator>
      <dc:date>2019-01-10T11:00:37Z</dc:date>
    </item>
    <item>
      <title>Re: FS4500 SBC FS0b release not worked</title>
      <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852500#M195</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;VSNS_UV bit in the&amp;nbsp;DIAG_VSUP_VCAN register&amp;nbsp;is&amp;nbsp;an image of Vbat.&amp;nbsp;After a POR, VSNS crosses&amp;nbsp;VSNS_UV and consequently&amp;nbsp;&lt;SPAN&gt;VSNS_UV flag is set:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76630i566D140EF02C708D/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you correctly stated, reading&amp;nbsp;&lt;SPAN&gt;DIAG_VSUP_VCAN register (0x2000) is required after a POR to clear this flag. Are you sure you are reading this register correctly during the initialization phase?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SPI_REQ indicates an invalid SPI access:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76631i26E20E8999ED47EC/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_5.png" alt="pastedImage_5.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Tomas&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Jan 2019 12:10:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852500#M195</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2019-01-10T12:10:49Z</dc:date>
    </item>
    <item>
      <title>Re: FS4500 SBC FS0b release not worked</title>
      <link>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852501#M196</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;1.Reading DIAG_VSUP_VCAN verified by SPI_G bit and communication was successful.&amp;nbsp;&lt;/P&gt;&lt;P&gt;But some how VSNS_UV was not cleared .&lt;/P&gt;&lt;P&gt;Is there is any other check points?&lt;/P&gt;&lt;P&gt;2.&lt;SPAN style="background-color: #ffffff; border: 0px; color: #51626f; font-weight: inherit; font-size: 14px;"&gt;what is the meaning for&amp;nbsp;&lt;STRONG style="border: 0px; font-weight: bold; font-size: 14px;"&gt;RSTB_EXT&lt;/STRONG&gt;(External)&lt;STRONG style="border: 0px; font-weight: bold; font-size: 14px;"&gt;&amp;nbsp;&lt;/STRONG&gt;set?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Jan 2019 16:18:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/FS4500-SBC-FS0b-release-not-worked/m-p/852501#M196</guid>
      <dc:creator>phanendravarma_</dc:creator>
      <dc:date>2019-01-10T16:18:52Z</dc:date>
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