Power ManagementのトピックRe: Regarding USBPHYLDO of PF1510

Regarding USBPHYLDO of PF1510

tomohisa_sakamo — Tue, 26 Feb 2019 07:01:38 GMT

Dear Support-team,

We have below questions about USBPHYLDO of PF1510.
Please support us.

<Question 1>
USBPHY (default 3.3 V output) seems to be described as being enable / disable with USBPHYLDO bit,
In the datasheet, USBPHYLDO = '0' for both Enable and Disable.
*The datasheet of PF 1550 is also the same description.

Is Enable / Disable control possible? (Is it a typo)?

<Question 2>
If it is set to Disable, will the USBPHY output become 0 V?

Best Regards,
T.Sakamoto@Ryosan

Re: Regarding USBPHYLDO of PF1510

reyes — Tue, 26 Feb 2019 21:38:20 GMT

Hi Tomohisa,

[Answer 1]

This is a typo, USBPHYLDO = ‘0’ is for Disabled and USBPHYLDO = ‘1’ should be for Enabled.

I reported this typo to the Apps team, I’ll be fixed for the next revision of the datasheet.

[Answer 2]

Correct, USBPHY LDO regulator can be 0V if USBPHYLDO bit is disabled (‘0’).

Have a great day,
Jose

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Re: Regarding USBPHYLDO of PF1510

tomohisa_sakamo — Wed, 27 Feb 2019 00:04:51 GMT

Dear Jose-san,

Thank you for your reply.

We understood your answers.

Thank you!

Best Regards,

T.Sakamoto@Ryosan