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    <title>topic Re: i.MX8Mplus power down sequence (PCA9450CHN) in Power Management</title>
    <link>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1376739#M1696</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/131642"&gt;@max123&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Strictly speaking, the worst scenario, when violating power supplies&lt;BR /&gt;requirements and restrictions is irreversible damage to the processor.&lt;BR /&gt;This looks as a very strict restriction for power down; really customers&lt;BR /&gt;can refer to NXP reference boards and use their schematic, even if some&lt;BR /&gt;sequence violations take place there. The reference designs were tested.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
    <pubDate>Thu, 25 Nov 2021 05:39:36 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2021-11-25T05:39:36Z</dc:date>
    <item>
      <title>i.MX8Mplus power down sequence (PCA9450CHN)</title>
      <link>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1376012#M1695</link>
      <description>&lt;P&gt;In my design, the PMIC will be powered by a 5V switching regulator. The 5V is generated from a 24V supply. In normal operation, the PMIC takes care of correct power down sequencing.&lt;/P&gt;&lt;P&gt;My question is related to power supply failures and short circuit in 24V. If violation of the power down sequence can cause damage to the processor, I would need to keep my 5V supply alive for at least 64ms even without a 24V supply, which can fail instantly in case of short circuit. This is not impossible, but would require some additional circuitry and capacitors.&lt;/P&gt;&lt;P&gt;Therefore my question: Can a violation of the power-down sequence damage the CPU, or is a correct sequencing only required for a correct reset?&lt;/P&gt;&lt;P&gt;The datasheet (IMX8MPIEC) only states the sequence, not the significance. The Evaluation board has no measures for this as far as I can see.&lt;/P&gt;</description>
      <pubDate>Wed, 24 Nov 2021 07:09:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1376012#M1695</guid>
      <dc:creator>max123</dc:creator>
      <dc:date>2021-11-24T07:09:23Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8Mplus power down sequence (PCA9450CHN)</title>
      <link>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1376739#M1696</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/131642"&gt;@max123&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Strictly speaking, the worst scenario, when violating power supplies&lt;BR /&gt;requirements and restrictions is irreversible damage to the processor.&lt;BR /&gt;This looks as a very strict restriction for power down; really customers&lt;BR /&gt;can refer to NXP reference boards and use their schematic, even if some&lt;BR /&gt;sequence violations take place there. The reference designs were tested.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Thu, 25 Nov 2021 05:39:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1376739#M1696</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-11-25T05:39:36Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8Mplus power down sequence (PCA9450CHN)</title>
      <link>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1377034#M1697</link>
      <description>&lt;P&gt;Thanks for the answer, this means I have to deal with this problem on my board, since switching the supply will happen. This leads to another question:&lt;/P&gt;&lt;P&gt;I could use PMIC_ON_REQ to initiate a power down from a voltage monitor in the 24V supply, bevore the 5v regulator is switched off.The capacitors in the 24V supply may be big enough to keep the 5V alive for the power-down sequence.&lt;/P&gt;&lt;P&gt;But the datasheets are not very clear on whether this signal is an open-drain-output on the CPU-Side or level/edge sensitive.&lt;/P&gt;&lt;P&gt;Is it possible to use PMIC_ON_REQ as "Enable" for the PMIC?&lt;/P&gt;</description>
      <pubDate>Thu, 25 Nov 2021 11:52:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1377034#M1697</guid>
      <dc:creator>max123</dc:creator>
      <dc:date>2021-11-25T11:52:13Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8Mplus power down sequence (PCA9450CHN)</title>
      <link>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1377363#M1698</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/131642"&gt;@max123&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; yes, PMIC_ON_REQ is special signal intended to control PMIC.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Fri, 26 Nov 2021 03:14:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Power-Management/i-MX8Mplus-power-down-sequence-PCA9450CHN/m-p/1377363#M1698</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-11-26T03:14:25Z</dc:date>
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