MQX Vybrid BSP Clock Configuration

ioseph_martinez — Thu, 02 Jan 2014 20:12:59 GMT

Hello MQX team,

(using MQX 4.1.0 Beta, Vybrid Auto EVB)

I am trying to configure clock frequency other than default one on my Vybrid AutoEVB (anyways, this may apply also to Vybrid TWR board)

Finding 1: Seems the definitions in \source\bsp\<board>\<board.h> are merely informative. THIS in vybrid_autoevb_a5.h

/* Init startup clock configuration is CPU_CLOCK_CONFIG_0 */

#define BSP_CLOCK_SRC (24000000)

#define BSP_CORE_CLOCK (396000000)

#define BSP_BUS_CLOCK (132000000)

#define BSP_IPG_CLOCK (66000000)

#define BSP_SYSTEM_CLOCK (BSP_CORE_CLOCK)

Question 1: If I change those values, no clock dividers or registers will be changed, correct? (after navigating on the bsp code, I found those definitions are used only for returning information about clocks)

Finding 2: only \source\bsp\<board>\init_hw.c seems to be the only instance which intializes/changes the CCM_CACRR register which controls the dividers for the different clocks in the System (i.e. clock definitions highlighted above)

Question 2: What is the propper/official way to modify the BSP to work at a different frequency than the ones highlighted above? (i.e. I want CPU and DDR to run at 320MHz)

Thanks,

Ioseph

Re: MQX Vybrid BSP Clock Configuration

alejandrolozan1 — Fri, 10 Jan 2014 18:29:54 GMT

Hi Ioseph,

You are correct in regards the macros you just mentioned. They are not used in the PLLs configuration.

The way the BSP is structured you will have to configure the PLLs according to your needs in the init_hw.c file just like you said, by means of the PFDs (Changing the ANADIG_PLLx_NUM, ANADIG_PLLx, DENOM registers).

Best Regards,

Alejandro

MQX Software SolutionsのトピックRe: MQX Vybrid BSP Clock Configuration

MQX Vybrid BSP Clock Configuration

Re: MQX Vybrid BSP Clock Configuration