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    <title>topic Re: About ISR in MQX in MQX Software Solutions</title>
    <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191517#M3747</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;So, the workaround could be this ?:&lt;/P&gt;&lt;PRE&gt;
void myIsrLevel7(pointer user_isr_ptr)
{
  clearing Some Flags
  Force interrupt with a lower int level
  (INTFRCHn, INTFRCLn)
 }&lt;/PRE&gt;&lt;P&gt;then doing the needed system call in ISR with an allowed interrupt Level (0 to MQX_HARDWARE_INTERRUPT_LEVEL_MAX)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Oct 2020 09:43:21 GMT</pubDate>
    <dc:creator>Nouchi</dc:creator>
    <dc:date>2020-10-29T09:43:21Z</dc:date>
    <item>
      <title>About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191515#M3745</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I didn't find the information in the MQX User Guide (but I maybe missed it),&amp;nbsp; I would like to know if it's possible to make a system call (_event_set(), _sem_post(), etc... ) in a &lt;EM&gt;non-maskable&lt;/EM&gt; (level 7) interrupt?&lt;/P&gt;&lt;P&gt;Because I need to use EPF7 edge port pin, and it's not possible to change its interrupt level&amp;nbsp;&lt;IMG alt=":smileysad:" class="emoticon emoticon-smileysad" id="smileysad" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-sad.gif" title="Smiley Sad" /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="message-edit-history"&gt;&lt;SPAN class="edit-author"&gt;Message Edited by BugMan on&lt;/SPAN&gt; &lt;SPAN class="local-date"&gt;2009-06-18&lt;/SPAN&gt; &lt;SPAN class="local-time"&gt;08:59 AM&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Jun 2009 13:56:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191515#M3745</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2009-06-18T13:56:14Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191516#M3746</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;No. You can call non-blocking functions from priority level n, where n &amp;lt;= MQX_HARDWARE_INTERRUPT_LEVEL_MAX.&amp;nbsp; This defaults to 6, and may be set to 0..6, but not to 7.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Jun 2009 17:08:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191516#M3746</guid>
      <dc:creator>EAI</dc:creator>
      <dc:date>2009-06-18T17:08:03Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191517#M3747</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;So, the workaround could be this ?:&lt;/P&gt;&lt;PRE&gt;
void myIsrLevel7(pointer user_isr_ptr)
{
  clearing Some Flags
  Force interrupt with a lower int level
  (INTFRCHn, INTFRCLn)
 }&lt;/PRE&gt;&lt;P&gt;then doing the needed system call in ISR with an allowed interrupt Level (0 to MQX_HARDWARE_INTERRUPT_LEVEL_MAX)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 09:43:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191517#M3747</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2020-10-29T09:43:21Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191518#M3748</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, you want to install myIsrLevel7 using _int_install_kernel_isr. You'll want&amp;nbsp;to declare myIsrLevel7 as _declspec(interrupt)&amp;nbsp;void&amp;nbsp;myIsrLevel7(void) ...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Jun 2009 19:38:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191518#M3748</guid>
      <dc:creator>EAI</dc:creator>
      <dc:date>2009-06-18T19:38:49Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191519#M3749</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you explained how to enable the _int_install_kernel_isr function, because I tried to recompile the PSP and the BSP with:&lt;/P&gt;&lt;P&gt;#define MQX_ROM_VECTORS&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;but it doesn't works.&lt;/P&gt;&lt;P&gt;It seems that the BSP has to be modified, but I don't know how.&lt;/P&gt;&lt;P&gt;I think the VBR needs to point to ram vector table and ram vector table should be filled with _int_kernel_isr address.&lt;/P&gt;&lt;P&gt;Anyway, the application needs vector table in ram, because it's launched by a bootloader.&lt;/P&gt;&lt;P&gt;Can you provide a demo with vector table in RAM?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;DIV class="message-edit-history"&gt;&lt;SPAN class="edit-author"&gt;Message Edited by BugMan on&lt;/SPAN&gt; &lt;SPAN class="local-date"&gt;2009-06-19&lt;/SPAN&gt; &lt;SPAN class="local-time"&gt;10:35 AM&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2009 15:35:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191519#M3749</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2009-06-19T15:35:16Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191520#M3750</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Nobody has done this before?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2009 19:39:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191520#M3750</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2009-06-22T19:39:45Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191521#M3751</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Bugman,&lt;/P&gt;&lt;P&gt;Example enclosed.&amp;nbsp; I used the mqx/examples/isr as a starting point.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/files/community_files/MQXGEN/256_isr.c" rel="nofollow" target="_self"&gt;isr.c&lt;/A&gt;&lt;/P&gt;&lt;DIV class="message-edit-history"&gt;&lt;SPAN class="edit-author"&gt;Message Edited by t.dowe on&lt;/SPAN&gt; &lt;SPAN class="local-date"&gt;2009-10-15&lt;/SPAN&gt; &lt;SPAN class="local-time"&gt;06:23 PM&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2009 21:16:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191521#M3751</guid>
      <dc:creator>DavidS</dc:creator>
      <dc:date>2009-06-22T21:16:50Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191522#M3752</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your example, but it doesn't work with M52259Demo BSP. Something missing, because _int_install_kernel_isr function do nothing and just return NULL pointer.&lt;/P&gt;&lt;P&gt;I think the BSP need to be modified with MQX_ROM_VECTORS disabled and the vector table relocated in RAM (1 kbytes wasted).&lt;/P&gt;&lt;P&gt;I was asking if a such BSP (or something similar) exist, or if I have to rewite it from the scratch?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2009 14:01:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191522#M3752</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2009-06-23T14:01:16Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191523#M3753</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I don't know where was the BSP problem, but since I create a new PSP and BSP with MQX 3.2.1 compiled with:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;
#define MQX_ROM_VECTORS      0&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;it works fine!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 09:43:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191523#M3753</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2020-10-29T09:43:23Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191524#M3754</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi DavidS ,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to use your example code, however, the example crashes everytime I try to run it.&lt;/P&gt;&lt;P&gt;Could you help me solve this issue as I need to use IRQ1 as interrupt?&lt;/P&gt;&lt;P&gt;I am using MQX 3.1 to compile your example.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Jul 2009 05:35:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191524#M3754</guid>
      <dc:creator>JaimeR</dc:creator>
      <dc:date>2009-07-24T05:35:59Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191525#M3755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I wrote the code into the BSP and that part of my application is working. This is the code I am using as quick start to get a EPORT pin configured as interrupt input. Hope it helps.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;
uint_32 IRQ_Initialize(    // los valores estan en binario   /* [IN] DTIM channel number */   uint_8 chn_num, pointer isr){ /* Body */      void     (_CODE_PTR_ result)(pointer);   uint_32   return_code = EPORT_OK;   VMCF5225_STRUCT_PTR reg_ptr = _PSP_GET_IPSBAR(); //Controlar registros del Micro   volatile PSP_INTERRUPT_TABLE_INDEX index;   volatile MCF5225_EPORT_STRUCT_PTR        eport_reg_ptr; // Estructura para controlar DTIM   eport_reg_ptr = (pointer)(&amp;amp;((VMCF5225_STRUCT_PTR)_PSP_GET_IPSBAR())-&amp;gt;EPORT[0]);      switch(chn_num)   {       case(1):             reg_ptr-&amp;gt;GPIO.PNQPAR |= 0x0004; //Funcion Primaria             reg_ptr-&amp;gt;GPIO.PNQPAR &amp;amp;= ~0x0008;             index = MCF5225_INT_EPORT0_EPF1;             eport_reg_ptr-&amp;gt;EPPAR &amp;amp;= ~0x000C;//Level Edge Triggered(LOW LEVEL)             eport_reg_ptr-&amp;gt;EPDDR &amp;amp;= ~0x02;//Configuracion como Entrada             eport_reg_ptr-&amp;gt;EPIER |= 0x02;//Habilita la interrupcion             break;       case(3):             reg_ptr-&amp;gt;GPIO.PNQPAR |= 0x0040;             reg_ptr-&amp;gt;GPIO.PNQPAR &amp;amp;= ~0x0080;             index = MCF5225_INT_EPORT0_EPF3;             eport_reg_ptr-&amp;gt;EPPAR &amp;amp;= ~0x00C0;             eport_reg_ptr-&amp;gt;EPDDR &amp;amp;= ~0x08;             eport_reg_ptr-&amp;gt;EPIER |= 0x08;             break;       case(5):             reg_ptr-&amp;gt;GPIO.PNQPAR |= 0x0400;             reg_ptr-&amp;gt;GPIO.PNQPAR &amp;amp;= ~0x0800;             index = MCF5225_INT_EPORT0_EPF5;             eport_reg_ptr-&amp;gt;EPPAR &amp;amp;= ~0x0C00;             eport_reg_ptr-&amp;gt;EPDDR &amp;amp;= ~0x20;             eport_reg_ptr-&amp;gt;EPIER |= 0x20;             break;       case(7):             reg_ptr-&amp;gt;GPIO.PNQPAR |= 0x4000;             reg_ptr-&amp;gt;GPIO.PNQPAR &amp;amp;= ~0x8000;             index = MCF5225_INT_EPORT0_EPF7;             eport_reg_ptr-&amp;gt;EPPAR &amp;amp;= ~0xC000;             eport_reg_ptr-&amp;gt;EPDDR &amp;amp;= ~0x80;             eport_reg_ptr-&amp;gt;EPIER |= 0x80;             break;       default:             return EPORT_INT_ENABLE_FAILED;             break;   }      result = _int_install_isr (index, (void (_CODE_PTR_))isr, (pointer)eport_reg_ptr);    if(result == NULL)   {      return_code = _task_get_error();   }      switch(chn_num)   {       case(1):              if ( _mcf5225_int_init(index, EPORT1_INT_LEVEL, EPORT1_INT_SUBLEVEL, TRUE) != MQX_OK)              {                  return (EPORT_INT_ENABLE_FAILED);              }             break;       case(3):              if ( _mcf5225_int_init(index, EPORT3_INT_LEVEL, EPORT3_INT_SUBLEVEL, TRUE) != MQX_OK)              {                  return (EPORT_INT_ENABLE_FAILED);              }             break;       case(4):              if ( _mcf5225_int_init(index, EPORT5_INT_LEVEL, EPORT5_INT_SUBLEVEL, TRUE) != MQX_OK)              {                  return (EPORT_INT_ENABLE_FAILED);              }             break;       case(7):              if ( _mcf5225_int_init(index, EPORT7_INT_LEVEL, EPORT7_INT_SUBLEVEL, TRUE) != MQX_OK)              {                  return (EPORT_INT_ENABLE_FAILED);              }             break;       default:             return EPORT_INT_ENABLE_FAILED;             break;   }   return return_code;} /* Endbody */void IRQ_ClearFlag(    /* [IN] DTIM device number */   uint_8 dev_num ){ /* Body */   volatile MCF5225_EPORT_STRUCT_PTR  eport_reg_ptr;   eport_reg_ptr = (pointer)(&amp;amp;((VMCF5225_STRUCT_PTR)_PSP_GET_IPSBAR())-&amp;gt;EPORT[ 0 ]);   switch( dev_num )   {       case(1): eport_reg_ptr-&amp;gt;EPFR |= 0x02;                break;       case(3): eport_reg_ptr-&amp;gt;EPFR |= 0x08;                break;       case(5): eport_reg_ptr-&amp;gt;EPFR |= 0x20;                break;       case(7): eport_reg_ptr-&amp;gt;EPFR |= 0x80;                break;       default: break;   }          } /* Endbody */&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&amp;nbsp;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 09:43:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191525#M3755</guid>
      <dc:creator>JaimeR</dc:creator>
      <dc:date>2020-10-29T09:43:25Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191526#M3756</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Just to confirm from your previous post, this solution relocates the vector table in RAM which consumes over 1KB of RAM space.&amp;nbsp; Right?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am running into the exact same problem.&amp;nbsp; I would like to install a very fast kernel IRQ7 interrupt whose only job is to enable a QSPI transfer.&amp;nbsp; I tried installing a kernel ISR using&amp;nbsp; _int_install_kernel_isr( ), but this kept returning a NULL pointer which I presume was caused by the fact that the vector table was located in ROM space.&amp;nbsp; I then added the line "#define MQX_ROM_VECTORS 0" in the user_define.h file of the BSP.&amp;nbsp; This is fine except it now seems to use up over 1KB of RAM space.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm working on an alternative which would be to have the vector table installed in ROM space (#define MQX_ROM_VECTORS 1), and then hard code the isr function in the vectors.c module of the BSP.&amp;nbsp;&amp;nbsp; Obviously, I won't need to make the MQX call _int_install_kernel_isr( ) with this method.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 29 Sep 2009 03:18:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191526#M3756</guid>
      <dc:creator>gmnelson</dc:creator>
      <dc:date>2009-09-29T03:18:27Z</dc:date>
    </item>
    <item>
      <title>Re: About ISR in MQX</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191527#M3757</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;BugMan up above had problems changing the MQX_ROM_VECTORS define.&amp;nbsp; If you are using the m52259demo board, add the following line to the board-specific MQX settings in Freescale MQX 3.4\config\m52259demo\user_config.h:&lt;/P&gt;&lt;P&gt;#define MQX_ROM_VECTORS&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here's the part I messed up, open Freescale MQX 3.4\config\m52259demo\build_libs.mcp.&amp;nbsp; Build this project which will update all of the sub-libraries.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here is the simplest program that I can think of to create a kernel isr and start measuring some latencies.&amp;nbsp; Create a blank hello world MQX project.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here is the irq function:&lt;/P&gt;&lt;P&gt;extern void external_isr(pointer);&lt;BR /&gt;__declspec(interrupt:0) void&amp;nbsp; external_isr(pointer testVal)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; /* Set the bit */&lt;BR /&gt;&amp;nbsp; PORTTC |= 0x08;&lt;BR /&gt;&amp;nbsp; EPFR = 0x02;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;add the following to the main task:&lt;/P&gt;&lt;P&gt;&amp;nbsp; unsigned short &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; temp;&lt;BR /&gt;&amp;nbsp; int&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; counter;&lt;BR /&gt;&amp;nbsp; int&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; outCnt;&lt;BR /&gt;&amp;nbsp; unsigned char&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; tmpU8;&lt;BR /&gt;&lt;BR /&gt;#define PIT_INTRPT_FLAG &amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0004&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; /* Set up the PIT0 timer to provide 1 ms pulse */&lt;BR /&gt;&amp;nbsp; PMR0 = 0x270f;&lt;BR /&gt;&amp;nbsp; PCSR0 = 0x0217;&lt;BR /&gt;&amp;nbsp; DDRTC = 0x0f;&lt;BR /&gt;&amp;nbsp; PORTTC = 0x00;&lt;BR /&gt;&amp;nbsp; counter = 0;&lt;BR /&gt;&amp;nbsp; outCnt = 0;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* Set up the Eport bit 1 to generate an interrupt on falling edge */&lt;BR /&gt;&amp;nbsp; EPPAR = 0x0008;&lt;BR /&gt;&amp;nbsp; EPIER = 0x02;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp; /* Install the kernel ISR */&lt;BR /&gt;&amp;nbsp; _int_install_kernel_isr(MCF5225_INT_EPORT0_EPF1, external_isr);&lt;BR /&gt;&amp;nbsp; _interrupt_controller_unmask(MCF5225_INT_EPORT0_EPF1);&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; while(1)&lt;BR /&gt;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; /* See if the PIT has timed out */&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; temp = PCSR0;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; if (temp &amp;amp; PIT_INTRPT_FLAG)&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; PCSR0 |= PIT_INTRPT_FLAG;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; counter++;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; if (counter == 1000)&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; outCnt++;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; outCnt &amp;amp;= 0x7;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; if (outCnt == 0)&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Clear all bits including interrupt indication */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PORTTC = 0;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; else&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tmpU8 = PORTTC;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; tmpU8 &amp;amp;= ~0x7;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; tmpU8 |= outCnt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PORTTC = tmpU8;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; counter = 0;&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;BR /&gt;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This counts from 1 to 7 using LED1 to LED3 on the board, and pressing SW2 causes a kernel interrupt and lights LED4.&amp;nbsp; When the LED1 to LED3 goes to 0, it also clears LED4 so you can take another measurement.&amp;nbsp; I apologize for the code not being commented very well, but hopefully this will help somebody not waste an hour or two trying to get this to work.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Oh yeah, to answer gmnelson, this does put the vector table in RAM which consumes the 1KB of RAM.&amp;nbsp; In production you might want to save the real vector table in flash so you don't lose this space.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="message-edit-history"&gt;&lt;SPAN class="edit-author"&gt;Message Edited by HSpahr on&lt;/SPAN&gt; &lt;SPAN class="local-date"&gt;2009-11-11&lt;/SPAN&gt; &lt;SPAN class="local-time"&gt;03:07 PM&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Nov 2009 23:05:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/About-ISR-in-MQX/m-p/191527#M3757</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2009-11-11T23:05:34Z</dc:date>
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