topic Re: MQX interrupt demistify in MQX Software Solutions

MQX interrupt demistify

mehmetekici — Tue, 20 Nov 2012 16:03:56 GMT

Hello,

I have been experimenting with MQX for a while. I had a difficulty understanding interrupt mechanism in detail. I searched the forum too. I see many people had similar issues. Would freescale please make a good description and several demo project to explain it in detail?

If we use MQX's native interrupt mechanism it seems a bit easier but there are issues with it as well. lwgpio for instance, only a single function can be registered for many pins on a single port. This needs to be explained too.

if we are going to use interrupts out of MQX mechanism. It is becoming totally blurry.

I also find task priorities and interrupt priorities mixture confusing.

I hope one can explain the issue in detail.

Regards,

Mehmet

Re: MQX interrupt demistify

Martin_ — Tue, 27 Nov 2012 09:46:00 GMT

Hello Mehmet,

MQX interrupt mechanism is described in the MQX User's Guide, chapter 3.9 Handling Interrupts and Exceptions.
Users need to get familiar with the information in it.
I admit it is missing implementation details for Kinetis.

From MQX user's perspective on Kinetis, I describe the implementation details in the attached document.

For the lwgpio, the Kinetis PORT module generates a single interrupt that asserts when the interrupt status flag is set for any enabled interrupt for that port.

Thus, we get into this vector by any enabled PORTx interrupt, and so we need to test PORTx_ISFR register in the interrupt service routine to find out, which pin of that port causes the interrupt request. (or, alternatively, lwgpio_int_get_flag() checks ISF bit of the specified PORTx_PCRn register).

Regards,

Martin

Re: MQX interrupt demistify

csmgsarma — Fri, 06 Jan 2017 06:28:59 GMT

Hi Martin,

This document does not give details of the latency due to the "_int_default_isr" executing user ISR.

I am assuming that when user ISR is registered by "_int_install_kernel_isr", the latency is(close to) as in the processor data sheet. While this can be done by adding some C code to the default_ISR, I want to ensure that I am not reinventing the wheel.

Best regards
Sarma